-> Add National instrument ethernet transceiver configuration used (DP83848) -> Change cpsw slave phy address -> modify nand configuration to use the correct ECC and correct nand features --- board/silica/pengwyn/board.c | 6 ---- drivers/net/phy/natsemi.c | 45 +++++++++++++++++++++++++++-- include/configs/pengwyn.h | 67 +++++++++++++++++++++++++++++++------------- 3 files changed, 90 insertions(+), 28 deletions(-)
diff --git a/board/silica/pengwyn/board.c b/board/silica/pengwyn/board.c index 815c9a7..1f5a586 100644 --- a/board/silica/pengwyn/board.c +++ b/board/silica/pengwyn/board.c @@ -141,12 +141,6 @@ static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, - .phy_addr = 0, - .phy_if = PHY_INTERFACE_MODE_MII, - }, - { - .slave_reg_ofs = 0x308, - .sliver_reg_ofs = 0xdc0, .phy_addr = 1, .phy_if = PHY_INTERFACE_MODE_MII, }, diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c index ea9fe83..d2e4c3c 100644 --- a/drivers/net/phy/natsemi.c +++ b/drivers/net/phy/natsemi.c @@ -53,7 +53,7 @@ static struct phy_driver DP83630_driver = {
/* NatSemi DP83865 */ -static int dp83865_config(struct phy_device *phydev) +static int dp838xx_config(struct phy_device *phydev) { phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); genphy_config_aneg(phydev); @@ -105,15 +105,56 @@ static struct phy_driver DP83865_driver = { .uid = 0x20005c70, .mask = 0xfffffff0, .features = PHY_GBIT_FEATURES, - .config = &dp83865_config, + .config = &dp838xx_config, .startup = &dp83865_startup, .shutdown = &genphy_shutdown, };
+/* NatSemi DP83848 */ +static int dp83848_parse_status(struct phy_device *phydev) +{ + int mii_reg; + + mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); + + if(mii_reg & (BMSR_100FULL | BMSR_100HALF)) { + phydev->speed = SPEED_100; + } else { + phydev->speed = SPEED_10; + } + + if (mii_reg & (BMSR_10FULL | BMSR_100FULL)) { + phydev->duplex = DUPLEX_FULL; + } else { + phydev->duplex = DUPLEX_HALF; + } + + return 0; +} + +static int dp83848_startup(struct phy_device *phydev) +{ + genphy_update_link(phydev); + dp83848_parse_status(phydev); + + return 0; +} + +static struct phy_driver DP83848_driver = { + .name = "NatSemi DP83848", + .uid = 0x20005c90, + .mask = 0x2000ff90, + .features = PHY_BASIC_FEATURES, + .config = &dp838xx_config, + .startup = &dp83848_startup, + .shutdown = &genphy_shutdown, +}; + int phy_natsemi_init(void) { phy_register(&DP83630_driver); phy_register(&DP83865_driver); + phy_register(&DP83848_driver);
return 0; } diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index ccb5dd3..d68cded 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -127,35 +127,58 @@ #define CONFIG_CMD_NAND #define CONFIG_NAND_OMAP_GPMC #define CONFIG_NAND_OMAP_ELM + +/* NAND Configuration. */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_PAGE_SIZE 4096 +#define CONFIG_SYS_NAND_OOBSIZE 224 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*4096) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, \ - 18, 19, 20, 21, 22, 23, 24, 25, \ - 26, 27, 28, 29, 30, 31, 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, } +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ + 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,\ + 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,\ + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,\ + 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,\ + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,\ + 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133,\ + 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,\ + 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173,\ + 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193,\ + 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209} +
#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_ECCBYTES 26 +#define CONFIG_SYS_NAND_ECCSTEPS 8 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW +/* END NAND Configuration. */ + #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +/* #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 + + + +#define CONFIG_CMD_MTDPARTS + +#define CONFIG_CMD_ASKENV /* monitor functions : ask for env variable */ +#define CONFIG_VERSION_VARIABLE /* monitor functions : u-boot version */ +#define CONFIG_CMD_DIAG /* monitor functions : Diagnostics */
#define MTDIDS_DEFAULT "nand0=omap2-nand.0" -#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ - "128k(SPL.backup1)," \ - "128k(SPL.backup2)," \ - "128k(SPL.backup3),1792k(u-boot)," \ - "128k(u-boot-spl-os)," \ - "128k(u-boot-env),5m(kernel),-(rootfs)" +/* Size must be a multiple of Nand erase size (524288 b) */ +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL)," \ + "512k(SPL.backup1)," \ + "512k(SPL.backup2)," \ + "512k(SPL.backup3),1536k(u-boot)," \ + "512k(u-boot-spl-os)," \ + "512k(u-boot-env),5m(kernel),-(rootfs)" #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ @@ -198,11 +221,15 @@ #undef CONFIG_SPL_ETH_SUPPORT #endif
+/* CPSW ethernet */ +#define CONFIG_NET_MULTI + /* Network */ #define CONFIG_CMD_MII #define CONFIG_PHYLIB #define CONFIG_PHY_RESET 1 #define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK
/* CPSW support */ #define CONFIG_SPL_ETH_SUPPORT