This converts 1 usage of this option to the non-SPL form, since there is no SPL_FSP_VERSION2 defined in Kconfig
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/x86/lib/fsp/fsp_dram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index cc889a688d8..3805a011dda 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -62,7 +62,7 @@ int dram_init_banksize(void) * DRAM range in MTRR otherwise the boot process goes very slowly, * which was observed on Chromebook Coral with FSP2. */ - update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2); + update_mtrr = IS_ENABLED(CONFIG_FSP_VERSION2);
if (!ll_boot_init()) { gd->bd->bi_dram[0].start = 0;