
Add pin configuration and pinmux support for UniPhier PH1-LD6b SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c | 94 +++++++++++++++++++++++++++++ 3 files changed, 101 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 7f729b6..757edce 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -33,4 +33,10 @@ config PINCTRL_UNIPHIER_PROXSTREAM2 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PH1_LD6B + bool "UniPhier PH1-LD6b SoC pinctrl driver" + depends on MACH_PH1_LD6B + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index aed038c..e215b10 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c new file mode 100644 index 0000000..8cd3936 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{109, 0}, {110, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{111, 0}, {112, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{115, 1}, {116, 1}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{118, 1}, {119, 1}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {30, 0}, {31, 0}, {32, 0}, {33, 0}, {34, 0}, {35, 0}, {36, 0}, {39, 0}, + {40, 0}, {41, 0}, {42, 0}, {43, 0}, {44, 0}, {45, 0}, {46, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{37, 0}, {38, 0}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{135, 3}, {136, 3}}; +static const struct uniphier_pmx_data uart0b_pmx[] = {{11, 2}, {12, 2}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{115, 0}, {116, 0}}; +static const struct uniphier_pmx_data uart1b_pmx[] = {{113, 1}, {114, 1}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{113, 2}, {114, 2}}; +static const struct uniphier_pmx_data uart2b_pmx[] = {{86, 1}, {87, 1}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{56, 0}, {57, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{58, 0}, {59, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{60, 0}, {61, 0}}; +static const struct uniphier_pmx_data usb3_pmx[] = {{62, 0}, {63, 0}}; + +static const struct uniphier_pinctrl_group ph1_ld6b_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart1b), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart2b), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const ph1_ld6b_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "uart0", + "uart1", + "uart2", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata ph1_ld6b_pinctrl_socdata = { + .groups = ph1_ld6b_groups, + .groups_count = ARRAY_SIZE(ph1_ld6b_groups), + .functions = ph1_ld6b_functions, + .functions_count = ARRAY_SIZE(ph1_ld6b_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_ld6b_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_ld6b_pinctrl_socdata); +} + +static const struct udevice_id ph1_ld6b_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld6b-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_ld6b_pinctrl) = { + .name = "ph1-ld6b-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_ld6b_pinctrl_match), + .probe = ph1_ld6b_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};