Hi Tristan,
On Fri, 8 Feb 2019 at 01:34, Tristan Bastian tristan-c.bastian@gmx.de wrote:
Hi Simon,
Simon Glass – Fri, 8. February 2019 5:12
Hi Tristan,
On Mon, 4 Feb 2019 at 08:01, Tristan Bastian tristan-c.bastian@gmx.de wrote:
Hi Simon,
I'm using the nyan-big chromebook (tegra124). Is it possible to replace coreboot + depthcharge with just u-boot on the
internal spi flash?
If so, do you have some instructions for that?
Possibly, although I would suggest being careful about that. Make sure you have a tool to revert the flash contents. Note that you will not have signed firmware so won't get updates. Presumably you are in dev mode anyway,
I've already got myself a SOIC flash clip and was able to extract the current content of the spi flash.
The instructions are just to flash the image.bin file that comes out of the build, once it exists. But there is no chromeos_nyan target as yet. So your only option right now is to build an image without verified boot, and use a script to boot Chrome OS. I have not tried on this nyan.
I'm not sure to which file you are referring to, since there is no image.bin file.. If I build u-boot with this command: "make -j4 O=b/nyan-big nyan-big_defconfig all" I'm getting these dot bin files: -rw-r--r-- 1 tristan tristan 691K Feb 8 08:09 u-boot.bin -rw-r--r-- 1 tristan tristan 691K Feb 8 08:09 u-boot-dtb.bin -rw-r--r-- 1 tristan tristan 16M Feb 8 08:09 u-boot-dtb-tegra.bin -rwxr-xr-x 1 tristan tristan 639K Feb 8 08:09 u-boot-nodtb.bin -rw-r--r-- 1 tristan tristan 16M Feb 8 08:09 u-boot-nodtb-tegra.bin -rw-r--r-- 1 tristan tristan 16M Feb 8 08:09 u-boot-tegra.bin
I would only be able to flash one of these files with flashrom to the spi chip if the file size equals the flash size.. I thought the 16MB files would be right, but nyan-big only has a flash size of about 4M..
The spi flash size seems to be configured in "include/configs/nyan-big.h" with: #define CONFIG_SPI_FLASH_SIZE (4 << 20) Which is the correct flash size (4194304)..
So should u-boot output a binary that I'm able to flash directly to the spi chip or are there some additional steps needed? If so, could you give me some hints on what to do?
That seems like a bug to me. I will see if I can take a look.
At the moment I'm chainloading u-boot, but this is causing some issues with
not working LPAE so I'm only getting 2 of my 4GB of memory..
So I would like to try and run u-boot natively to see if chainloading is the
problem or u-boot itself..
Or maybe you have some instructions to run coreboot + u-boot without
depthcharge?
I suppose you could put U-Boot in the image in instead of dc and it might work.
Sorry for asking, but do you have some instructions for replacing dc?
I don't see much point in use coreboot on ARM when U-Boot already has support for the platform. U-Boot's coreboot support is really more aimed at x86, where coreboot has a lot of support.
Sorry I missed this email.
Regards, Simon