Dear s-paulraj@ti.com,
In message 1250613233-3362-1-git-send-email-s-paulraj@ti.com you wrote:
From: Sandeep Paulraj s-paulraj@ti.com
This patch adds 4 BIT ECC support in the DaVinci NAND driver. Tested on both the DM355 and DM365.
V3 version of the patch resolves compilation warnings pointed to by Scott Wood. These compilation warnings occur when 4 BIT ECC support is not enabled
Such commetns must go _below_ the "---" line.
Signed-off-by: Sandeep Paulraj s-paulraj@ti.com
^^^^^^^ This is where commetns belong.
For feature completeness this patch should be used along with [PATCH v2] ARM: DaVinci DM355: Updating the DM355 EVM config that i just sent to the mailing list drivers/mtd/nand/davinci_nand.c | 283 +++++++++++++++++++++++++++++- include/asm-arm/arch-davinci/emif_defs.h | 10 + 2 files changed, 291 insertions(+), 2 deletions(-)
...
+static u32 nand_davinci_4bit_readecc(struct mtd_info *mtd, unsigned int ecc[4]) +{
- ecc[0] = emif_regs->NAND4BITECC1 & NAND_4BITECC_MASK;
- ecc[1] = emif_regs->NAND4BITECC2 & NAND_4BITECC_MASK;
- ecc[2] = emif_regs->NAND4BITECC3 & NAND_4BITECC_MASK;
- ecc[3] = emif_regs->NAND4BITECC4 & NAND_4BITECC_MASK;
Please use I/O accessors.
Best regards,
Wolfgang Denk