On Thu, 16 Sep 2010 19:51:33 -0700 Tabi Timur-B04825 B04825@freescale.com wrote:
Jaggi Manish-B10520 wrote:
Most of the read/write functions do this way 0:+ int sw = set_mux_to_lbc(); 1:+ 2:+ ret = __raw_readl(addr); 3:+ if (sw) 4:+ set_mux_to_diu();
compiler might reorder 2 before 3 and 0, read / write wont have any issue , right ?
Really? I don't see why the compiler would do that. That would be a bug, IMHO.
Only if set_mux_to_lbc() is non-inline, and the compiler has no visibility into what it does.
But even then, the hardware is free to reorder. That's why we have non-raw I/O accessors.
Can you explain why you think it will make such a reordering? My understanding is that the compiler reorders things that don't have any side effects.
The compiler can reorder anything where the reordering won't affect the results of single-threaded execution with no interrupts, well-behaved memory (no device registers, bank switches, etc), no violations of aliasing rules, etc.
-Scott