
2 Jun
2022
2 Jun
'22
3:57 p.m.
SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch.
Signed-off-by: Michal Simek michal.simek@amd.com ---
arch/microblaze/cpu/start.S | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index a35d8d8ea29a..2aae4a0b7ccb 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -268,6 +268,7 @@ relocate_code: * r7 - reloc_addr */ addi r1, r5, 0 /* Start to use new SP */ + mts rshr, r1 addi r31, r6, 0 /* Start to use new GD */
add r23, r0, r7 /* Move reloc addr to r23 */
--
2.36.0