On Sel, 2017-06-06 at 11:41 +0200, Marek Vasut wrote:
On 06/06/2017 11:36 AM, Chee, Tien Fong wrote:
On Sel, 2017-06-06 at 10:35 +0200, Marek Vasut wrote:
On 06/06/2017 10:19 AM, Chee, Tien Fong wrote:
On Sel, 2017-06-06 at 10:03 +0200, Marek Vasut wrote:
On 06/06/2017 08:35 AM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
This patch is for enabling FPGA driver support on SPL
Why would we want that on Gen5 ? I believe this is only needed on Gen10.
I already moved the fpga_manager driver into drivers/fpga/ on patch 6, and fpga_manager drivers are required on SPL. Actually fpga_manager driver should be part of the drivers/fpga.
I think I miss some fundamental piece of information . Why would I need anything from the FPGA framework in SPL on Gen5 ? It is not needed thus far. Is it because you shuffled some of the code around or what ?
Because we need to know some status and mode type from FPGA even we did not program FPGA in SPL.
But we didn't have this option enabled before and everything worked on gen5, why do we need it now ?
Because i already move them into fpga driver, because those functions should be part of fpga driver. So, this moving happen in patch 6.