Dear Rajeshwari Shinde,
On 4 May 2012 20:12, Rajeshwari Shinde rajeshwari.s@samsung.com wrote:
This patch adds functions to enable/disable the power of USB host controller for EXYNOS5.
Signed-off-by: Vivek Gautam gautam.vivek@samsung.com Signed-off-by: Che-Liang Chiou clchiou@chromium.org Signed-off-by: Rajeshwari Shinde rajeshwari.s@samsung.com
change log.
This patchset is based on: USB: EXYNOS: Add ehci support.patch
arch/arm/cpu/armv7/exynos/power.c | 37 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/power.h | 4 +++ drivers/usb/host/ehci-exynos.c | 4 +++ 3 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index c765304..b2944b5 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -52,3 +52,40 @@ void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable) if (cpu_is_exynos4()) exynos4_mipi_phy_control(dev_index, enable); }
+void exynos5_ps_hold_setup(void) +{
- struct exynos5_power *power =
- (struct exynos5_power *)samsung_get_base_power();
- /* Set PS-Hold high */
- setbits_le32(&power->ps_hold_control, POWER_PS_HOLD_CONTROL_DATA_HIGH);
Then, we can't set ps_hold to low?
+}
+void exynos5_enable_usb_phy(unsigned int enable) +{
- struct exynos5_power *power =
- (struct exynos5_power *)samsung_get_base_power();
- if (enable) {
- /* Enabling USBHOST_PHY */
- setbits_le32(&power->usbhost_phy_control,
- POWER_USB_HOST_PHY_CTRL_EN);
- } else {
- /* Disabling USBHost_PHY */
USBHOST or USBHost?
- clrbits_le32(&power->usbhost_phy_control,
- POWER_USB_HOST_PHY_CTRL_EN);
- }
+}
+void ps_hold_setup(void)
set_ps_hold_ctrl.
+{
- if (cpu_is_exynos5())
- exynos5_ps_hold_setup();
+}
+void power_enable_usb_phy(unsigned int enable)
set_usbhost_phy_ctrl.
+{
- if (cpu_is_exynos5())
- exynos5_enable_usb_phy(enable);
+}
Thanks. Minkyu Kang.