This is the 2nd version of patchset to adds support for Intel Arria 10 SoC. This version mainly resolved comments from Marek in [v1].
This is initial patchset enables the basic support for Arria 10 and other features will come after this.
This series is working on top of “arm: socfpga: Move to using distro boot” series [1] from Dalon Westergreen.
[1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg239560.html
v1 -> v2 changes: ----------------- - Changed to use wait_for_bit() for status polling - Sorted #ifdef in GEN5 then ARRIA10 order. - Removed the keyword "register" and "volatile" - Changed to use errno.h error code - Dropped "drivers: Makefile: include fpga build in SPL" patch - A10 reset driver - Combined reset_assert_uart() & reset_deassert_uart() - Moved reset_uart to later patch - A10 clock driver - Moved clock driver GEN5 update to new patch - Changed global clock variables to static - Moved cm_print_clock_quick_summary() to Gen5 and Arria 10 - Resolved warnings and errors from checkpatch.pl.
Patchset history ---------------- [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg240052.html
Ley Foon Tan (20): arm: socfpga: Restructure clock manager driver arm: socfpga: Update clock for Gen5 arm: socfpga: Restructure reset manager driver arm: socfpga: Restructure misc driver arm: socfpga: Restructure system manager arm: socfpga: Add A10 defines arm: socfpga: Add reset driver support for Arria 10 arm: socfpga: Add clock driver for Arria 10 arm: socfpga: Add system manager for Arria 10 arm: socfpga: Add sdram header file for Arria 10 arm: socfpga: Add misc support for Arria 10 arm: socfpga: Add pinmux for Arria 10 fdt: Add compatible strings for Arria 10 arm: dts: Add dts and dtsi for Arria 10 arm: socfpga: Add SPL support for Arria 10 drivers: fpga: Add compile switch for Gen5 only registers arm: socfpga: Convert Altera ddr driver to use Kconfig arm: socfpga: Add config and defconfig for Arria 10 arm: socfpga: Add board files for the Arria10 arm: socfpga: Enable build for Arria 10
arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria10.dtsi | 859 +++++++++++++++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 30 + .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 479 +++++++++ arch/arm/mach-socfpga/Kconfig | 10 + arch/arm/mach-socfpga/Makefile | 41 +- arch/arm/mach-socfpga/clock_manager.c | 526 +--------- arch/arm/mach-socfpga/clock_manager_arria10.c | 1104 ++++++++++++++++++++ arch/arm/mach-socfpga/clock_manager_gen5.c | 536 ++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 314 +----- .../include/mach/clock_manager_arria10.h | 222 ++++ .../mach-socfpga/include/mach/clock_manager_gen5.h | 322 ++++++ arch/arm/mach-socfpga/include/mach/misc.h | 32 + arch/arm/mach-socfpga/include/mach/pinmux.h | 15 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 44 +- .../include/mach/reset_manager_arria10.h | 144 +++ .../mach-socfpga/include/mach/reset_manager_gen5.h | 47 + arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 177 ++-- .../include/mach/system_manager_arria10.h | 81 ++ .../include/mach/system_manager_gen5.h | 122 +++ arch/arm/mach-socfpga/misc.c | 361 +------ arch/arm/mach-socfpga/misc_arria10.c | 254 +++++ arch/arm/mach-socfpga/misc_gen5.c | 356 +++++++ arch/arm/mach-socfpga/pinmux_arria10.c | 96 ++ arch/arm/mach-socfpga/reset_manager.c | 93 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 380 +++++++ arch/arm/mach-socfpga/reset_manager_gen5.c | 113 ++ arch/arm/mach-socfpga/spl.c | 55 +- arch/arm/mach-socfpga/system_manager.c | 85 -- arch/arm/mach-socfpga/system_manager_gen5.c | 85 ++ board/altera/arria10-socdk/Kconfig | 18 + board/altera/arria10-socdk/Makefile | 7 + board/altera/arria10-socdk/socfpga.c | 7 + configs/socfpga_arria10_defconfig | 30 + drivers/Kconfig | 2 + drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 + drivers/fpga/socfpga.c | 6 + include/configs/socfpga_arria10_socdk.h | 67 ++ include/configs/socfpga_common.h | 33 +- include/dt-bindings/reset/altr,rst-mgr-a10.h | 103 ++ include/fdtdec.h | 8 + lib/fdtdec.c | 8 + 45 files changed, 6163 insertions(+), 1505 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c create mode 100644 arch/arm/mach-socfpga/clock_manager_gen5.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/misc_arria10.c create mode 100644 arch/arm/mach-socfpga/misc_gen5.c create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_gen5.c delete mode 100644 arch/arm/mach-socfpga/system_manager.c create mode 100644 arch/arm/mach-socfpga/system_manager_gen5.c create mode 100644 board/altera/arria10-socdk/Kconfig create mode 100644 board/altera/arria10-socdk/Makefile create mode 100644 board/altera/arria10-socdk/socfpga.c create mode 100644 configs/socfpga_arria10_defconfig create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig create mode 100644 include/configs/socfpga_arria10_socdk.h create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h