20 Sep
2016
20 Sep
'16
8 p.m.
On 08/29/2016 02:16 AM, Shengzhou Liu wrote:
From: York Sun york.sun@nxp.com
DDR controller 5.2.1 has this erratum A008511 partially fixed. The workaround needs to be adjusted to take advantage of Vref training. This patch enables the training and force output enable to be off.
Erratum A009803 requires the controller to be idel before enabling address parity. It was combined with workaround for A008511. With new A008511 flow, this flow needs to be changed to enabling data init (D_INIT) after the address parity is enabled.
Signed-off-by: York Sun york.sun@nxp.com
Added your signed-off-by.
Applied to fsl-qoriq master. Awaiting upstream. Thanks.
York