
27 Aug
2018
27 Aug
'18
5:03 p.m.
On Sun, Aug 26, 2018 at 06:08:23PM +0530, Jagan Teki wrote:
Now clock and reset drivers are available for respective SoC's so use clk and reset ops on phy driver.
Tested-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
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Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com