On Jan 11, 2011, at 3:46 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 1294733436-10264-1-git-send-email-galak@kernel.crashing.org you wrote:
Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO.
We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically.
We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled.
Introduced the following standard defines for board config.h:
CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available
(where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)
[ These mimic what we have for PCI and PCIe controllers ]
Signed-off-by: Kumar Gala galak@kernel.crashing.org
- Renamed CONFIG_SYS_HAS_SRIO -> CONFIG_SYS_SRIO
- Added defines to README
README | 18 +++++++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 +++- arch/powerpc/cpu/mpc85xx/fdt.c | 7 ++- arch/powerpc/cpu/mpc8xxx/Makefile | 1 + arch/powerpc/cpu/mpc8xxx/fdt.c | 23 ++++++++- arch/powerpc/cpu/mpc8xxx/srio.c | 86 +++++++++++++++++++++++++++++++ arch/powerpc/include/asm/fsl_law.h | 1 + board/freescale/corenet_ds/corenet_ds.c | 44 ---------------- include/configs/corenet_ds.h | 19 ++++--- 9 files changed, 151 insertions(+), 56 deletions(-) create mode 100644 arch/powerpc/cpu/mpc8xxx/srio.c
Acked-by: Wolfgang Denk wd@denx.de
applied to 85xx
- k