[U-Boot] [PATCH 15/19] riscv: Return to previous privilege level after trap handling

At present the trap handler returns to M-mode only. Change to returning to previous privilege level instead.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/riscv/cpu/mtrap.S | 3 --- 1 file changed, 3 deletions(-)

diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S index 6c0eac6..c9010c7 100644 --- a/arch/riscv/cpu/mtrap.S +++ b/arch/riscv/cpu/mtrap.S @@ -68,9 +68,6 @@ trap_entry: jal handle_trap csrw mepc, a0

- /* Remain in M-mode after mret */ - li t0, MSTATUS_MPP - csrs mstatus, t0 LREG x1, 1 * REGBYTES(sp) LREG x3, 3 * REGBYTES(sp) LREG x4, 4 * REGBYTES(sp)