[U-Boot] [PATCH 01/19] ARM: zynq: DT: Use the right names for nodes

22 Jul 2015

Based on SPEC you right names with addresses.
Signed-off-by: Michal Simek michal.simek@xilinx.com
---
Sync with the kernel
---
 arch/arm/dts/zynq-7000.dtsi | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 920715989e95..6faac4044627 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -51,7 +51,7 @@
    	interrupt-parent = <&intc>;
    	ranges;
-		i2c0: zynq-i2c@e0004000 {
+		i2c0: i2c@e0004000 {
    		compatible = "cdns,i2c-r1p10";
    		status = "disabled";
    		clocks = <&clkc 38>;
@@ -62,7 +62,7 @@
    		#size-cells = <0>;
    	};
-		i2c1: zynq-i2c@e0005000 {
+		i2c1: i2c@e0005000 {
    		compatible = "cdns,i2c-r1p10";
    		status = "disabled";
    		clocks = <&clkc 39>;
@@ -82,7 +82,7 @@
    		      <0xF8F00100 0x100>;
    	};
-		L2: cache-controller {
+		L2: cache-controller@f8f02000 {
    		compatible = "arm,pl310-cache";
    		reg = <0xF8F02000 0x1000>;
    		arm,data-latency = <3 2 2>;
@@ -91,7 +91,7 @@
    		cache-level = <2>;
    	};
-		uart0: uart@e0000000 {
+		uart0: serial@e0000000 {
    		compatible = "xlnx,xuartps";
    		status = "disabled";
    		clocks = <&clkc 23>, <&clkc 40>;
@@ -100,7 +100,7 @@
    		interrupts = <0 27 4>;
    	};
-		uart1: uart@e0001000 {
+		uart1: serial@e0001000 {
    		compatible = "xlnx,xuartps";
    		status = "disabled";
    		clocks = <&clkc 24>, <&clkc 41>;
@@ -153,7 +153,7 @@
    		clock-names = "pclk", "hclk", "tx_clk";
    	};
-		sdhci0: ps7-sdhci@e0100000 {
+		sdhci0: sdhci@e0100000 {
    		compatible = "arasan,sdhci-8.9a";
    		status = "disabled";
    		clock-names = "clk_xin", "clk_ahb";
@@ -163,7 +163,7 @@
    		reg = <0xe0100000 0x1000>;
    	} ;
-		sdhci1: ps7-sdhci@e0101000 {
+		sdhci1: sdhci@e0101000 {
    		compatible = "arasan,sdhci-8.9a";
    		status = "disabled";
    		clock-names = "clk_xin", "clk_ahb";
@@ -207,7 +207,7 @@
    		clocks = <&clkc 4>;
    	};
-		ttc0: ttc0@f8001000 {
+		ttc0: timer@f8001000 {
    		interrupt-parent = <&intc>;
    		interrupts = < 0 10 4 0 11 4 0 12 4 >;
    		compatible = "cdns,ttc";
@@ -215,14 +215,14 @@
    		reg = <0xF8001000 0x1000>;
    	};
-		ttc1: ttc1@f8002000 {
+		ttc1: timer@f8002000 {
    		interrupt-parent = <&intc>;
    		interrupts = < 0 37 4 0 38 4 0 39 4 >;
    		compatible = "cdns,ttc";
    		clocks = <&clkc 6>;
    		reg = <0xF8002000 0x1000>;
    	};
-		scutimer: scutimer@f8f00600 {
+		scutimer: timer@f8f00600 {
    		interrupt-parent = <&intc>;
    		interrupts = < 1 13 0x301 >;
    		compatible = "arm,cortex-a9-twd-timer";
-- 
2.3.5


    