Hello Andreas,
Am 29.10.2013 10:43, schrieb Andreas Bießmann:
Hi Heiko,
some additional comments on top of Bo's.
On 10/28/2013 06:24 AM, Bo Shen wrote:
Hi Heiko Schocher,
Please add commit message.
On 10/22/2013 13:51, Heiko Schocher wrote:
Signed-off-by: Roger Meierr.meier@siemens.com Reviewed-by: Heiko Schocherhs@denx.de Cc: Andreas Bießmannandreas.devel@googlemail.com
board/siemens/taurus/Makefile | 38 ++++++++ board/siemens/taurus/taurus.c | 204 ++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 2 + include/configs/taurus.h | 163 +++++++++++++++++++++++++++++++++ 4 files changed, 407 insertions(+) create mode 100644 board/siemens/taurus/Makefile create mode 100644 board/siemens/taurus/taurus.c create mode 100644 include/configs/taurus.h
diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile new file mode 100644 index 0000000..9c288b7 --- /dev/null +++ b/board/siemens/taurus/Makefile @@ -0,0 +1,38 @@ +# +# Makefile for Siemens TAURUS (AT91SAM9G20) based board +# (C) Copyright 2013 Siemens AG +# +# Based on: +# U-Boot file: board/atmel/at91sam9260ek/Makefile +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Popstelian@popies.net +# Lead Tech Design<www.leadtechdesign.com> +# +# SPDX-License-Identifier: GPL-2.0+ +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).o
+COBJS-y += taurus.o
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+#########################################################################
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c new file mode 100644 index 0000000..debc48e --- /dev/null +++ b/board/siemens/taurus/taurus.c @@ -0,0 +1,204 @@ +/*
- Board functions for Siemens TAURUS (AT91SAM9G20) based boards
- (C) Copyright Siemens AG
- Based on:
- U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
- (C) Copyright 2007-2008
- Stelian Popstelian@popies.net
- Lead Tech Design<www.leadtechdesign.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#include<common.h> +#include<asm/io.h> +#include<asm/arch/at91sam9260_matrix.h> +#include<asm/arch/at91sam9_smc.h> +#include<asm/arch/at91_common.h> +#include<asm/arch/at91_pmc.h> +#include<asm/arch/at91_rstc.h> +#include<asm/arch/gpio.h> +#include<asm/arch/at91sam9_sdramc.h> +#include<atmel_mci.h>
+#if defined(CONFIG_RESET_PHY_R)&& defined(CONFIG_MACB) +# include<net.h> +#endif +#include<netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+/*
*/ +/*
- Miscelaneous platform dependent initialisations
- */
I think this comment no meaning here.
+#ifdef CONFIG_CMD_NAND +static void taurus_nand_hw_init(void) +{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct at91_matrix *matrix = (struct at91_matrix
*)ATMEL_BASE_MATRIX;
- unsigned long csa;
- /* Assign CS3 to NAND/SmartMedia Interface */
- csa = readl(&matrix->ebicsa);
- csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
- writel(csa,&matrix->ebicsa);
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),+&smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),+&smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+&smc->cs[3].cycle);
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |AT91_SMC_MODE_DBW_8 |AT91_SMC_MODE_TDF_CYCLE(3),+&smc->cs[3].mode);
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+} +#endif
+#ifdef CONFIG_MACB +static void taurus_macb_hw_init(void) +{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
- struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
- unsigned long erstl;
- /* Enable EMAC clock */
- writel(1<< ATMEL_ID_EMAC0,&pmc->pcer);
- /*
* Disable pull-up on:* RXDV (PA17) => PHY normal mode (not Test mode)* ERX0 (PA14) => PHY ADDR0* ERX1 (PA15) => PHY ADDR1* ERX2 (PA25) => PHY ADDR2* ERX3 (PA26) => PHY ADDR3* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0** PHY has internal pull-down*/- writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |pin_to_mask(AT91_PIN_PA17) |pin_to_mask(AT91_PIN_PA25) |pin_to_mask(AT91_PIN_PA26) |pin_to_mask(AT91_PIN_PA28),+&pioa->pudr);
Call we use GPIO API here?
Unfortunately there is no way to set multiple I/O in one go. Beside that this is more PIO API than GPIO API (same as the kernel side discussion about gpio vs pinmux). I would accept this her in that special case, preferably we could add some API to mux multiple pins in one go.
I used "at91_set_pio_pullup" in my new version for this ...
- /*
* Need to reset PHY ?-> 200us reset* Bug within Atmel CPU (undefined initial states on io-lines)!* Startup Ethernet Switch delayed so that hardstrap(Switch Config)* has defined state after cold start (do not break daisy chain!).*/- if ((readl(&rstc->sr)& AT91_RSTC_RSTTYP) ==
AT91_RSTC_RSTTYP_GENERAL)
at91_set_gpio_output(AT91_PIN_PA25, 0);- erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
AT91_RSTC_MR_URSTEN,&rstc->mr);- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
- /* Wait for end hardware reset */
- while (!(readl(&rstc->sr)& AT91_RSTC_SR_NRSTL))
;Add a timeout here.
- /* Restore NRST value */
- writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,&rstc->mr);
- at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
- /* Re-enable pull-up */
- writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |pin_to_mask(AT91_PIN_PA17) |pin_to_mask(AT91_PIN_PA25) |pin_to_mask(AT91_PIN_PA26) |pin_to_mask(AT91_PIN_PA28),+&pioa->puer);
Call we use GPIO API here?
- /* Initialize EMAC=MACB hardware */
- at91_macb_hw_init();
+} +#endif
+#ifdef CONFIG_GENERIC_ATMEL_MCI +int board_mmc_init(bd_t *bd) +{
- at91_mci_hw_init();
- return atmel_mci_init((void *)ATMEL_BASE_MCI);
+} +#endif
+int board_early_init_f(void) +{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- /* Enable clocks for all PIOs */
- writel((1<< ATMEL_ID_PIOA) | (1<< ATMEL_ID_PIOB) |
(1<< ATMEL_ID_PIOC),+&pmc->pcer);
Isn't there some API to do this? To answer myself, I think not. Each AT91 board has this piece of code copied in its board_early_init_f ... we should think about adding a generic function to do that for us.
Ok.
- return 0;
+}
+int board_init(void) +{
- /* Enable Ctrlc */
- console_init_f();
This is can be removed.
- /* arch number of board */
- gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
Move to board related configuration file.
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- at91_seriald_hw_init();
+#ifdef CONFIG_CMD_NAND
- taurus_nand_hw_init();
+#endif +#ifdef CONFIG_MACB
- taurus_macb_hw_init();
+#endif
- return 0;
+}
+int dram_init(void) +{
- /* configure ram size based on sdram controller config registers */
- unsigned int sdram_cr_nc;
- sdram_cr_nc = readl(AT91_SDRAMC_CR)& AT91_SDRAMC_NC;
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
(32<< 20)<< sdram_cr_nc);Would it be possible the same NC, however different NR?
Hasn't the get_ram_size() some feature to detect the real size implemented? Why detect the configured size before?
I use now get_ram_size() with the may ram size possible, so no need for sdram_cr_nc anymore ...
- return 0;
+}
+int board_eth_init(bd_t *bis) +{
- int rc = 0;
+#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+#endif
- return rc;
+} diff --git a/boards.cfg b/boards.cfg index aa2ee64..e693105 100644 --- a/boards.cfg +++ b/boards.cfg @@ -139,6 +139,8 @@ Active arm arm926ejs at91 ronetix pm9263 Active arm arm926ejs at91 ronetix pm9g45 pm9g45 pm9g45:AT91SAM9G45 Ilko Ilieviliev@ronetix.at Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubigmhubig@imko.de Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubigmhubig@imko.de +Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068 Heiko Schocherhs@denx.de +Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067 Heiko Schocherhs@denx.de
Why two boards here?
Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocherhs@denx.de Active arm arm926ejs davinci Barix ipam390 ipam390
Heiko Schocherhs@denx.de Active arm arm926ejs davinci davinci da8xxevm da830evm
Nick Thompsonnick.thompson@gefanuc.com diff --git a/include/configs/taurus.h b/include/configs/taurus.h new file mode 100644 index 0000000..e4bbb63 --- /dev/null +++ b/include/configs/taurus.h @@ -0,0 +1,163 @@ +/*
- Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
- (C) Copyright 2013 Siemens AG
- Based on:
- U-Boot file: include/configs/at91sam9260ek.h
- (C) Copyright 2007-2008
- Stelian Popstelian@popies.net
- Lead Tech Design<www.leadtechdesign.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+/*
- SoC must be defined first, before hardware.h is included.
- In this case SoC is defined in boards.cfg.
- */
+#include<asm/hardware.h>
+#define MACH_TYPE_TAURUS 2067 +#define MACH_TYPE_AXM 2068
These two type are the same board?
Isn't the correct type defined by boards.cfg?
removed.
+/*
- Warning: changing CONFIG_SYS_TEXT_BASE requires
- adapting the initial boot program.
- Since the linker has to swallow that define, we must use a pure
- hex number here!
- */
Could you please remove the empty lines (at least one) here?
Yep, done.
+#define CONFIG_SYS_TEXT_BASE 0x23f00000
This address should be considered (if the memory size is 64MiB) as u-boot is top down map, there is only 1MiB left.
As discussed in the Calo USB-A9263 board, please prove that the address works in all cases (with the given setup in this file). IOW check if now code will be clobbered by relocate_code() and write it down in some comment. A reminder for later adoption in the configuration would also considered helpful ;)
Working on it (incl. replace at91bootstrap with U-Boot spl, will take some time ...)
+/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ +#define CONFIG_SYS_HZ 1000
+/* Misc CPU related */ +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ +#define CONFIG_OF_LIBFDT
+/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
+/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS
replace tab with black space.
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTDELAY 3
+/*
- Command line configuration.
- */
+#include<config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE
+#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND
+/*
- SDRAM: 1 bank, min 32, max 128 MB
- Initialized before u-boot gets started.
- */
+#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +/*
- PHYS_SDRAM_SIZE is dynamically detected according to the
- "Number of Column Bits" set within the SDRAM Configuration
- register, see axm.c for further details
Where is this axm.c located?
Removed comment, as ramsize gets detected now with get_ram_size()
- */
+/*
- Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
- leaving the correct space for initial global data structure above
- that address while providing maximum stack area below.
- */
+# define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1<< 21) +#define CONFIG_SYS_NAND_MASK_CLE (1<< 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 +#endif
+/* NOR flash - no real flash on this board */ +#define CONFIG_SYS_NO_FLASH 1
+/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_RMII
+/* USB */ +#if (CONFIG_MACH_TYPE == MACH_TYPE_TAURUS)
Ah, got it .. forget the question at beginnign of file.
Hmm, removed this, and replaced with a BOARD_TAURS or BOARD_AXM define.
+#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
discard the unnessacery "1"
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#endif
+/* load address */ +#define CONFIG_SYS_LOAD_ADDR 0x22000000
+/* bootstrap in spi flash , u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET_REDUND 0x180000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" +#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
Use mtdparts also in u-boot?
Try to find this out ...
bye, Heiko