
13 Aug
2019
13 Aug
'19
6:52 p.m.
On Fri, May 24, 2019 at 10:30:00AM +0800, Ley Foon Tan wrote:
This fix issue when access config from PCIe switch.
The PCIe controller need to send Type 0 config TLP if the targeting bus matches with the secondary bus number, which is when the TLP is targeting the immediate device on the link.
The PCIe controller send Type 1 config TLP if the targeting bus is larger than the secondary bus, which is when the TLP is targeting the device not immediate on the link.
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
Applied to u-boot/master, thanks!
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Tom