
9 Nov
2018
9 Nov
'18
8:05 p.m.
On 11/9/2018 1:17 AM, Peng Fan wrote:
Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM....
+static struct dram_cfg_param lpddr4_ddrc_cfg[] = {
- /* Start to config, default 3200mbps */
- /* dis_dq=1, indicates no reads or writes are issued to SDRAM */
- { DDRC_DBG1(0), 0x00000001 },
Just a little elaboration on how a structure might work here
#define DDRC_ADDR(reg, x) &((struct ddrc *)(DDRC_IPS_BASE_ADDR(x))->reg)
{ DDRC_ADDR(dbg1, 0), 0x00000001 },
Thanks for working on this Peng!
BR Troy