Hi Matthias,
On Thursday 10 January 2008, Matthias Fuchs wrote:
I tested your updated NAND repo on a PLU405 board (405EP with small block NAND attached to EBC+GPIOs).
I found two more issues and incompatibilities against the current mainline code:
- The new code is much more noisy during startup:
Old: ... DRAM: 32 MB FLASH: 1 MB NAND: 32 MiB PCI: Bus Dev VenId DevId Class Int ...
New: ... FLASH: 1 MB NAND: NAND device: Manufacturer ID: 0xec, Chip ID: 0x75 (Samsung NAND 32MiB 3,3V 8-bit) Scanning device for bad blocks Bad eraseblock 261 at 0x00414000 Bad eraseblock 352 at 0x00580000 Bad eraseblock 846 at 0x00d38000 Bad eraseblock 848 at 0x00d40000 32 MiB PCI: Bus Dev VenId DevId Class Int ...
Perhaps we should calme is down by using the option 'CFG_NAND_QUIET_TEST'. Also the formatting of the output is not very pretty.
Yes, we should remove those lines. I suggest to use debug() for here, so that they are printed when DEBUG is defined.
- 'nand read.jffs2' and 'nand read.i' do not read anything.
'nand read' is ok. Are there any boards where you tested this ok?
No, I didn't test this. IIRC there is still a TODO in the source that this still has to be implemented/tested. It shouldn't be that hard though. I would really appreciate it if you (or somebody else) could take a look at this.
Thanks.
BTW: I'm not available today.
Best regards, Stefan
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