Hi Bin,
Am Do., 23. Mai 2019 um 04:17 Uhr schrieb Bin Meng bmeng.cn@gmail.com:
Hi Christian,
On Thu, May 23, 2019 at 2:40 AM Simon Glass sjg@chromium.org wrote:
Hi Christian,
On Wed, 22 May 2019 at 02:40, Christian Gmeiner christian.gmeiner@gmail.com wrote:
When using the coreboot target CONFIG_DM_SCSI gets set to y. This has the effect that the current 'enable bus mastering' logic gets not compiled in. This change
Where is it missing? Is it because U-Boot is not scanning the PCI bus?
If this is the case, we should fix similar issue on other devices, not just only SATA.
In the ahci driver there is some bus master stuff - but not build with the coreboot configuration. See: https://git.denx.de/?p=u-boot.git;a=blob;f=drivers/ata/ahci.c;h=e3135bb75fdd...
Other drivers I am using on this platform are fine and do the bus master enable thing. - e1000 - xhci
fixes ahci problems I am seeing on an Intel Apollolake device.
Signed-off-by: Christian Gmeiner christian.gmeiner@gmail.com
drivers/ata/ahci.c | 6 ++++++ 1 file changed, 6 insertions(+)