This stops clock except INTC-RT, MSIF, INTC-SYS, IRQC and SCIF before kernel boots.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/rcar-gen2-common/common.c | 38 ++++++++++++++++++++++++++++++--- include/configs/alt.h | 10 +++++++++ include/configs/gose.h | 10 +++++++++ include/configs/koelsch.h | 11 ++++++++++ include/configs/lager.h | 10 +++++++++ 5 files changed, 76 insertions(+), 3 deletions(-)
diff --git a/board/renesas/rcar-gen2-common/common.c b/board/renesas/rcar-gen2-common/common.c index 23010ee..0103f42 100644 --- a/board/renesas/rcar-gen2-common/common.c +++ b/board/renesas/rcar-gen2-common/common.c @@ -16,12 +16,44 @@ #define TSTR0 0x04 #define TSTR0_STR0 0x01
-#define TMU0_MSTP125 (1 << 25) +static struct mstp_ctl mstptbl[] = { + { SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA, + RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA }, + { SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA, + RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA }, + { SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA, + RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA }, + { SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA, + RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA }, + { SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA, + RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA }, + { SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA, + RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA }, + /* No MSTP6 */ + { SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA, + RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA }, + { SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA, + RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA }, + { SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA, + RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA }, + { SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA, + RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA }, + { SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA, + RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA }, +}; + void arch_preboot_os(void) { + int i; + /* stop TMU0 */ mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
- /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + /* Stop module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis, + mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis, + mstptbl[i].r_ena); + } } diff --git a/include/configs/alt.h b/include/configs/alt.h index cd60d07..a0ed608 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -92,4 +92,14 @@ #define CONFIG_USB_EHCI_RMOBILE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF2 */ +#define CONFIG_SMSTP7_ENA 0x00080000 + #endif /* __ALT_H */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 77f4fd0..df9d63f 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -88,4 +88,14 @@ #define CONFIG_USB_EHCI_RMOBILE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __GOSE_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b6fb1dc..97c2321 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -89,4 +89,15 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE
+ +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF*/ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __KOELSCH_H */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 37be38f..9c89b16 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -93,4 +93,14 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE
+/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF0 */ +#define CONFIG_SMSTP7_ENA 0x00200000 + #endif /* __LAGER_H */