Signed-off-by: Otavio Salvador otavio@ossystems.com.br --- arch/arm/cpu/arm926ejs/mxs/mx28.c | 8 +- .../cpu/arm926ejs/mxs/{mx28_init.h => mxs_init.h} | 14 +- arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 20 +-- arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 6 +- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 30 ++-- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 150 ++++++++++---------- arch/arm/include/asm/arch-mxs/sys_proto.h | 4 +- board/denx/m28evk/spl_boot.c | 2 +- board/freescale/mx28evk/iomux.c | 2 +- 9 files changed, 118 insertions(+), 118 deletions(-) rename arch/arm/cpu/arm926ejs/mxs/{mx28_init.h => mxs_init.h} (81%)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c index dc271cf..a61f75b 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mx28.c +++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c @@ -222,8 +222,8 @@ static const char *get_cpu_rev(void)
int print_cpuinfo(void) { - struct mx28_spl_data *data = (struct mx28_spl_data *) - ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); + struct mxs_spl_data *data = (struct mxs_spl_data *) + ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
printf("CPU: Freescale i.MX%s rev%s at %d MHz\n", get_cpu_type(), @@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void) { - struct mx28_spl_data *data = (struct mx28_spl_data *) - ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); + struct mxs_spl_data *data = (struct mxs_spl_data *) + ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
if (data->mem_dram_size == 0) { printf("MX28:\n" diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h similarity index 81% rename from arch/arm/cpu/arm926ejs/mxs/mx28_init.h rename to arch/arm/cpu/arm926ejs/mxs/mxs_init.h index e3a4493..2ddc5bc 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mx28_init.h +++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h @@ -28,18 +28,18 @@
void early_delay(int delay);
-void mx28_power_init(void); +void mxs_power_init(void);
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT -void mx28_power_wait_pswitch(void); +void mxs_power_wait_pswitch(void); #else -static inline void mx28_power_wait_pswitch(void) { } +static inline void mxs_power_wait_pswitch(void) { } #endif
-void mx28_mem_init(void); -uint32_t mx28_mem_get_size(void); +void mxs_mem_init(void); +uint32_t mxs_mem_get_size(void);
-void mx28_lradc_init(void); -void mx28_lradc_enable_batt_measurement(void); +void mxs_lradc_init(void); +void mxs_lradc_enable_batt_measurement(void);
#endif /* __M28_INIT_H__ */ diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index a6dfca3..46f6770 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -31,7 +31,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h>
-#include "mx28_init.h" +#include "mxs_init.h"
/* * This delay function is intended to be used only in early stage of boot, where @@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = { MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, };
-uint8_t mx28_get_bootmode_index(void) +uint8_t mxs_get_bootmode_index(void) { uint8_t bootmode = 0; int i; @@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void) return i; }
-void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, +void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, const unsigned int iomux_size) { - struct mx28_spl_data *data = (struct mx28_spl_data *) - ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); - uint8_t bootmode = mx28_get_bootmode_index(); + struct mxs_spl_data *data = (struct mxs_spl_data *) + ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf); + uint8_t bootmode = mxs_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); - mx28_power_init(); + mxs_power_init();
- mx28_mem_init(); - data->mem_dram_size = mx28_mem_get_size(); + mxs_mem_init(); + data->mem_dram_size = mxs_mem_get_size();
data->boot_mode_idx = bootmode;
- mx28_power_wait_pswitch(); + mxs_power_wait_pswitch(); }
/* Support aparatus */ diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c index c1df81d..d90f0a1 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c @@ -28,9 +28,9 @@ #include <asm/io.h> #include <asm/arch/imx-regs.h>
-#include "mx28_init.h" +#include "mxs_init.h"
-void mx28_lradc_init(void) +void mxs_lradc_init(void) { struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
@@ -49,7 +49,7 @@ void mx28_lradc_init(void) LRADC_CTRL4_LRADC6SELECT_CHANNEL10); }
-void mx28_lradc_enable_batt_measurement(void) +void mxs_lradc_enable_batt_measurement(void) { struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index e7ed5e0..88d1abe 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -29,7 +29,7 @@ #include <asm/arch/iomux-mx28.h> #include <asm/arch/imx-regs.h>
-#include "mx28_init.h" +#include "mxs_init.h"
static uint32_t mx28_dram_vals[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = { 0x00000000, 0x00010001 };
-void __mx28_adjust_memory_params(uint32_t *dram_vals) +void __mxs_adjust_memory_params(uint32_t *dram_vals) { } -void mx28_adjust_memory_params(uint32_t *dram_vals) - __attribute__((weak, alias("__mx28_adjust_memory_params"))); +void mxs_adjust_memory_params(uint32_t *dram_vals) + __attribute__((weak, alias("__mxs_adjust_memory_params")));
void init_mx28_200mhz_ddr2(void) { int i;
- mx28_adjust_memory_params(mx28_dram_vals); + mxs_adjust_memory_params(mx28_dram_vals);
for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++) writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i)); }
-void mx28_mem_init_clock(void) +void mxs_mem_init_clock(void) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; @@ -129,7 +129,7 @@ void mx28_mem_init_clock(void) early_delay(10000); }
-void mx28_mem_setup_cpu_and_hbus(void) +void mxs_mem_setup_cpu_and_hbus(void) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; @@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void) early_delay(15000); }
-void mx28_mem_setup_vdda(void) +void mxs_mem_setup_vdda(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void) &power_regs->hw_power_vddactrl); }
-void mx28_mem_setup_vddd(void) +void mxs_mem_setup_vddd(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void) &power_regs->hw_power_vdddctrl); }
-uint32_t mx28_mem_get_size(void) +uint32_t mxs_mem_get_size(void) { uint32_t sz, da; uint32_t *vt = (uint32_t *)0x20; @@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void) return sz; }
-void mx28_mem_init(void) +void mxs_mem_init(void) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; @@ -219,9 +219,9 @@ void mx28_mem_init(void)
early_delay(11000);
- mx28_mem_init_clock(); + mxs_mem_init_clock();
- mx28_mem_setup_vdda(); + mxs_mem_setup_vdda();
/* * Configure the DRAM registers @@ -242,9 +242,9 @@ void mx28_mem_init(void) while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20))) ;
- mx28_mem_setup_vddd(); + mxs_mem_setup_vddd();
early_delay(10000);
- mx28_mem_setup_cpu_and_hbus(); + mxs_mem_setup_cpu_and_hbus(); } diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index e67ea28..baff56d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -28,9 +28,9 @@ #include <asm/io.h> #include <asm/arch/imx-regs.h>
-#include "mx28_init.h" +#include "mxs_init.h"
-void mx28_power_clock2xtal(void) +void mxs_power_clock2xtal(void) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; @@ -40,7 +40,7 @@ void mx28_power_clock2xtal(void) &clkctrl_regs->hw_clkctrl_clkseq_set); }
-void mx28_power_clock2pll(void) +void mxs_power_clock2pll(void) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; @@ -52,7 +52,7 @@ void mx28_power_clock2pll(void) CLKCTRL_CLKSEQ_BYPASS_CPU); }
-void mx28_power_clear_auto_restart(void) +void mxs_power_clear_auto_restart(void) { struct mxs_rtc_regs *rtc_regs = (struct mxs_rtc_regs *)MXS_RTC_BASE; @@ -85,7 +85,7 @@ void mx28_power_clear_auto_restart(void) ; }
-void mx28_power_set_linreg(void) +void mxs_power_set_linreg(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -104,7 +104,7 @@ void mx28_power_set_linreg(void) POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW); }
-int mx28_get_batt_volt(void) +int mxs_get_batt_volt(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -115,16 +115,16 @@ int mx28_get_batt_volt(void) return volt; }
-int mx28_is_batt_ready(void) +int mxs_is_batt_ready(void) { - return (mx28_get_batt_volt() >= 3600); + return (mxs_get_batt_volt() >= 3600); }
-int mx28_is_batt_good(void) +int mxs_is_batt_good(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; - uint32_t volt = mx28_get_batt_volt(); + uint32_t volt = mxs_get_batt_volt();
if ((volt >= 2400) && (volt <= 4300)) return 1; @@ -145,7 +145,7 @@ int mx28_is_batt_good(void)
early_delay(500000);
- volt = mx28_get_batt_volt(); + volt = mxs_get_batt_volt();
if (volt >= 3500) return 0; @@ -160,7 +160,7 @@ int mx28_is_batt_good(void) return 0; }
-void mx28_power_setup_5v_detect(void) +void mxs_power_setup_5v_detect(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -172,7 +172,7 @@ void mx28_power_setup_5v_detect(void) POWER_5VCTRL_PWRUP_VBUS_CMPS); }
-void mx28_src_power_init(void) +void mxs_src_power_init(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -203,7 +203,7 @@ void mx28_src_power_init(void) clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); }
-void mx28_power_init_4p2_params(void) +void mxs_power_init_4p2_params(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -227,7 +227,7 @@ void mx28_power_init_4p2_params(void) 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); }
-void mx28_enable_4p2_dcdc_input(int xfer) +void mxs_enable_4p2_dcdc_input(int xfer) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -323,7 +323,7 @@ void mx28_enable_4p2_dcdc_input(int xfer) POWER_CTRL_ENIRQ_VDD5V_DROOP); }
-void mx28_power_init_4p2_regulator(void) +void mxs_power_init_4p2_regulator(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -346,7 +346,7 @@ void mx28_power_init_4p2_regulator(void) * gradually to avoid large inrush current from the 5V cable which can * cause transients/problems */ - mx28_enable_4p2_dcdc_input(0); + mxs_enable_4p2_dcdc_input(0);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { /* @@ -407,7 +407,7 @@ void mx28_power_init_4p2_regulator(void) writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); }
-void mx28_power_init_dcdc_4p2_source(void) +void mxs_power_init_dcdc_4p2_source(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -417,7 +417,7 @@ void mx28_power_init_dcdc_4p2_source(void) hang(); }
- mx28_enable_4p2_dcdc_input(1); + mxs_enable_4p2_dcdc_input(1);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { clrbits_le32(&power_regs->hw_power_dcdc4p2, @@ -429,7 +429,7 @@ void mx28_power_init_dcdc_4p2_source(void) } }
-void mx28_power_enable_4p2(void) +void mxs_power_enable_4p2(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -451,11 +451,11 @@ void mx28_power_enable_4p2(void) setbits_le32(&power_regs->hw_power_vddioctrl, POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT);
- mx28_power_init_4p2_params(); - mx28_power_init_4p2_regulator(); + mxs_power_init_4p2_params(); + mxs_power_init_4p2_regulator();
/* Shutdown battery (none present) */ - if (!mx28_is_batt_ready()) { + if (!mxs_is_batt_ready()) { clrbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_BO_MASK); writel(POWER_CTRL_DCDC4P2_BO_IRQ, @@ -464,7 +464,7 @@ void mx28_power_enable_4p2(void) &power_regs->hw_power_ctrl_clr); }
- mx28_power_init_dcdc_4p2_source(); + mxs_power_init_dcdc_4p2_source();
writel(vdddctrl, &power_regs->hw_power_vdddctrl); early_delay(20); @@ -488,7 +488,7 @@ void mx28_power_enable_4p2(void) &power_regs->hw_power_charge_clr); }
-void mx28_boot_valid_5v(void) +void mxs_boot_valid_5v(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -508,10 +508,10 @@ void mx28_boot_valid_5v(void) writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ, &power_regs->hw_power_ctrl_clr);
- mx28_power_enable_4p2(); + mxs_power_enable_4p2(); }
-void mx28_powerdown(void) +void mxs_powerdown(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -520,7 +520,7 @@ void mx28_powerdown(void) &power_regs->hw_power_reset); }
-void mx28_batt_boot(void) +void mxs_batt_boot(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -542,7 +542,7 @@ void mx28_batt_boot(void) clrsetbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
- mx28_power_set_linreg(); + mxs_power_set_linreg();
clrbits_le32(&power_regs->hw_power_vdddctrl, POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG); @@ -564,7 +564,7 @@ void mx28_batt_boot(void) 0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); }
-static int mx28_valid_vbus(void) +static int mxs_valid_vbus(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -573,7 +573,7 @@ static int mx28_valid_vbus(void) return readl(&power_regs->hw_power_sts) & POWER_STS_VBUSVALID0_STATUS; }
-void mx28_handle_5v_conflict(void) +void mxs_handle_5v_conflict(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -590,48 +590,48 @@ void mx28_handle_5v_conflict(void) * VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes * unreliable */ - mx28_powerdown(); + mxs_powerdown(); break; }
- if (mx28_valid_vbus() || (tmp & POWER_STS_VDD5V_GT_VDDIO)) { - mx28_boot_valid_5v(); + if (mxs_valid_vbus() || (tmp & POWER_STS_VDD5V_GT_VDDIO)) { + mxs_boot_valid_5v(); break; } else { /* Neither 5v sees 5v so we power down */ - mx28_powerdown(); + mxs_powerdown(); break; }
if (tmp & POWER_STS_PSWITCH_MASK) { - mx28_batt_boot(); + mxs_batt_boot(); break; } } }
-void mx28_5v_boot(void) +void mxs_5v_boot(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE;
- if (mx28_valid_vbus() && + if (mxs_valid_vbus() && (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO)) { - mx28_boot_valid_5v(); + mxs_boot_valid_5v(); return; }
early_delay(1000); - if (mx28_valid_vbus() && + if (mxs_valid_vbus() && (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO)) { - mx28_boot_valid_5v(); + mxs_boot_valid_5v(); return; }
- mx28_handle_5v_conflict(); + mxs_handle_5v_conflict(); }
-void mx28_init_batt_bo(void) +void mxs_init_batt_bo(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -645,7 +645,7 @@ void mx28_init_batt_bo(void) writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr); }
-void mx28_switch_vddd_to_dcdc_source(void) +void mxs_switch_vddd_to_dcdc_source(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -659,7 +659,7 @@ void mx28_switch_vddd_to_dcdc_source(void) POWER_VDDDCTRL_DISABLE_STEPPING); }
-void mx28_power_configure_power_source(void) +void mxs_power_configure_power_source(void) { int batt_ready, batt_good; struct mxs_power_regs *power_regs = @@ -667,15 +667,15 @@ void mx28_power_configure_power_source(void) struct mxs_lradc_regs *lradc_regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
- mx28_src_power_init(); + mxs_src_power_init();
- batt_ready = mx28_is_batt_ready(); + batt_ready = mxs_is_batt_ready();
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { - batt_good = mx28_is_batt_good(); + batt_good = mxs_is_batt_good(); if (batt_ready) { /* 5V source detected, good battery detected. */ - mx28_batt_boot(); + mxs_batt_boot(); } else { if (batt_good) { /* 5V source detected, low battery detceted. */ @@ -686,21 +686,21 @@ void mx28_power_configure_power_source(void) clrbits_le32(&power_regs->hw_power_battmonitor, POWER_BATTMONITOR_BATT_VAL_MASK); } - mx28_5v_boot(); + mxs_5v_boot(); } } else { /* 5V not detected, booting from battery. */ - mx28_batt_boot(); + mxs_batt_boot(); }
- mx28_power_clock2pll(); + mxs_power_clock2pll();
- mx28_init_batt_bo(); + mxs_init_batt_bo();
- mx28_switch_vddd_to_dcdc_source(); + mxs_switch_vddd_to_dcdc_source(); }
-void mx28_enable_output_rail_protection(void) +void mxs_enable_output_rail_protection(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -718,7 +718,7 @@ void mx28_enable_output_rail_protection(void) POWER_VDDIOCTRL_PWDN_BRNOUT); }
-int mx28_get_vddio_power_source_off(void) +int mxs_get_vddio_power_source_off(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -746,7 +746,7 @@ int mx28_get_vddio_power_source_off(void)
}
-int mx28_get_vddd_power_source_off(void) +int mxs_get_vddd_power_source_off(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -777,7 +777,7 @@ int mx28_get_vddd_power_source_off(void) return 0; }
-void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) +void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -791,7 +791,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) cur_target *= 50; /* 50 mV step*/ cur_target += 2800; /* 2800 mV lowest */
- powered_by_linreg = mx28_get_vddio_power_source_off(); + powered_by_linreg = mxs_get_vddio_power_source_off(); if (new_target > cur_target) {
if (powered_by_linreg) { @@ -874,7 +874,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET); }
-void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) +void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; @@ -888,7 +888,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) cur_target *= 25; /* 25 mV step*/ cur_target += 800; /* 800 mV lowest */
- powered_by_linreg = mx28_get_vddd_power_source_off(); + powered_by_linreg = mxs_get_vddd_power_source_off(); if (new_target > cur_target) { if (powered_by_linreg) { bo_int = readl(&power_regs->hw_power_vdddctrl); @@ -971,31 +971,31 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET); }
-void mx28_setup_batt_detect(void) +void mxs_setup_batt_detect(void) { - mx28_lradc_init(); - mx28_lradc_enable_batt_measurement(); + mxs_lradc_init(); + mxs_lradc_enable_batt_measurement(); early_delay(10); }
-void mx28_power_init(void) +void mxs_power_init(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE;
- mx28_power_clock2xtal(); - mx28_power_clear_auto_restart(); - mx28_power_set_linreg(); - mx28_power_setup_5v_detect(); + mxs_power_clock2xtal(); + mxs_power_clear_auto_restart(); + mxs_power_set_linreg(); + mxs_power_setup_5v_detect();
- mx28_setup_batt_detect(); + mxs_setup_batt_detect();
- mx28_power_configure_power_source(); - mx28_enable_output_rail_protection(); + mxs_power_configure_power_source(); + mxs_enable_output_rail_protection();
- mx28_power_set_vddio(3300, 3150); + mxs_power_set_vddio(3300, 3150);
- mx28_power_set_vddd(1350, 1200); + mxs_power_set_vddd(1350, 1200);
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ | @@ -1008,7 +1008,7 @@ void mx28_power_init(void) }
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT -void mx28_power_wait_pswitch(void) +void mxs_power_wait_pswitch(void) { struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h index 7337458..91645eb 100644 --- a/arch/arm/include/asm/arch-mxs/sys_proto.h +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h @@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
#ifdef CONFIG_SPL_BUILD #include <asm/arch/iomux-mx28.h> -void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, +void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, const unsigned int iomux_size); #endif
@@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = { { 0x00, 0x00, "Reserved/Unknown/Wrong" }, };
-struct mx28_spl_data { +struct mxs_spl_data { uint8_t boot_mode_idx; uint32_t mem_dram_size; }; diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c index 7a12592..49e8a75 100644 --- a/board/denx/m28evk/spl_boot.c +++ b/board/denx/m28evk/spl_boot.c @@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void) { - mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); + mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); } diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c index 40d8cf6..16a6d8a 100644 --- a/board/freescale/mx28evk/iomux.c +++ b/board/freescale/mx28evk/iomux.c @@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals)
void board_init_ll(void) { - mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); + mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); }