Ira Snyder wrote:
On Fri, Jul 18, 2008 at 02:17:48PM -0400, Jerry Van Baren wrote:
I checked include/configs/MPC8349EMDS.h and didn't find any obvious config options for disabling the cache.
The hang happens before the relocation to RAM. The "I2C:" line where it hangs is printed before the relocation. There are "SPI:" and "DRAM:" lines that should also be printed before the relocation to RAM.
I2C is used to read the SPD configuration off the memory DIMM. Interesting, but I'm not sure what it is telling us...
Yep. Note that there is an access to the BCSR registers that I added. Removing the access makes the problem go away, even with the .data section 32 byte aligned. There shouldn't be any problem reading the BCSR registers, though.
What I'm getting at is maybe it is neither of these that is the real problem, it could just be that the BCSR access plus the alignment of the .data section triggers the real problem, whatever it may be.
Hmmm, interesting point: reading the BCSR is implicated. Are you sure that reading the BCSR is safe *at this point in time*? Have you confirmed CS1 is configured this early in the boot sequence?
[snip]
What is your build host running (OS, distribution)? Any chance of doing a clean OS and ELDK installation on a different machine?
I'm running Ubuntu Hardy. My test machine here has a completely clean, not updated installation of Hardy on it as well, I could try installing and building with that. I also have access to a CentOS 4 machine that I could install ELDK-4.2 onto. It has ELDK-4.1 already installed. I'll try ELDK-4.2 on the CentOS machine as soon as the install media is finished downloading, which will take a while. It might be Monday before I have a chance to get back to you with the results.
That is so low a probability that I wouldn't bother unless I were really desperate.
Thanks again, Ira
Have a good weekend, gvb