Hello,
I am getting a bus fault error after the ME bit in the MSR register gets set, and the RFI instruction is executed. If the ME bit is 0, everything works fine, and u-boot runs without any problems. The bus fault error is at "b __440_msr_continue" instruction in the start.s file, which is the next instruction executed after the RFI instruction. Is it a memory alignment issue?
Thank you,
U-Boot 2010.09-rc2 (Oct 19 2010 - 07:03:13)
CPU: AMCC PowerPC 440GP Rev. C at 300 MHz (PLB=100 OPB=50 EBC=50) Internal PCI arbiter enabled 32 kB I-Cache 32 kB D-Cache Board: Starter440 - BRE PPC440GP Evaluation Board I2C: ready DRAM: 256 MiB Top of RAM usable for U-Boot at: 10000000 Reserving 323k for U-Boot at: 0ffaf000 Reserving 1024k for malloc() at: 0feaf000 Reserving 128 Bytes for Board Info at: 0feaef80 Reserving 56 Bytes for Global Data at: 0feaef48 Stack Pointer at: 0feaef28 New Stack Pointer is: 0feaef28 memstart: 00000000 memsize: 10000000 sramstart: c0000000 sramsize: 00001fff bootflags: e0000700 intfreq: 11e1a301 busfreq: 05f5e100 baudrate: 0001c200 bi_s_version: 0feaefb8 bi_r_version: 0feaefbc bi_procfreq: 11e1a301 bi_plb_busfreq: 05f5e100 relocaddr: 0ffaf000 id: 0feaef48 Now running in RAM - U-Boot at: 0ffaf000 Bus Fault @ 0x0ffb1750, fixup 0x00000000 Machine Check Exception. Caused by (from msr): regs 0feaee18 NIP: 0FFB1750 XER: 00000000 LR: 0FFB1750 REGS: 0feaee18 TRAP: 0200 DEAR: 00000000 MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 0FFB1198 0FEAEF08 0FEAEF48 0FFAF000 0FFB260C 00000000 00000000 0FFB1750 GPR08: 00000600 000020A4 00000002 00000002 0FFEE600 00000000 00000000 0FFEF000 GPR16: 00000000 00000000 00000000 00000000 00000000 0FEAEE08 00000000 0FEAEFB8 GPR24: 0FEAEFBC 0FEAEF48 0FEAEF28 0FFAF000 0FEAF000 0FEAF000 0FFEE6B4 0FEAEF80 Call backtrace: 0FFB2604 0FFB16B4 machine check