2016-10-27 23:46 GMT+09:00 Masahiro Yamada yamada.masahiro@socionext.com:
- DDR PHY init code updates
- Some bug fixes
Masahiro Yamada (11): ARM: uniphier: enable SSC for more PLLs for LD20 SoC ARM: uniphier: remove unused board attribute macros ARM: uniphier: update DRAM init code for LD20 SoC (3rd) ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8 ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3 ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC ARM: uniphier: refactor DDR PHY parameter dump command ARM: uniphier: support DDR PHY parameter dump command for LD11 ARM: uniphier: update DRAM init code for LD11 SoC
Series, applied to u-boot-uniphier/master.