Signed-off-by: Ashish Kumar Ashish.Kumar@nxp.com --- v2: Add dependent patch set
README | 6 ++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 +++++++ board/freescale/ls1088a/eth_ls1088aqds.c | 7 +++++++ 3 files changed, 20 insertions(+)
diff --git a/README b/README index f288176..8508d17 100644 --- a/README +++ b/README @@ -3475,6 +3475,12 @@ Low Level (hardware related) configuration options: Note that this is a global option, we can't have one FEC in standard MII mode and another in RMII mode.
+- CONFIG_SGMII_PHYLIB + Enable SGMII with PHY mode. + SGMII interface should have on-board PHY or PHY on riser-card. + Disabling this option gives flexibility to use non-PHY + SGMII interface + - CONFIG_CRC32_VERIFY Add a verify option to the crc32 command. The syntax is: diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5daf79e..46813ba 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -479,6 +479,13 @@ config SYS_FSL_HAS_RGMII bool depends on SYS_FSL_EC1 || SYS_FSL_EC2
+config SGMII_PHYLIB + bool "SGMII PHY LIB" + depends on ARCH_LS1088A + default y if TARGET_LS1088AQDS + help + SGMII interface can be PHY-less or with PHY. + By default it is configured with PHY
config SYS_MC_RSV_MEM_ALIGN hex "Management Complex reserved memory alignment" diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index 7fe446e..5466c81 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -462,7 +462,10 @@ static void initialize_dpmac_to_slot(void)
void ls1088a_handle_phy_interface_sgmii(int dpmac_id) { +#ifdef CONFIG_SGMII_PHYLIB struct mii_dev *bus; +#endif + struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; u32 serdes1_prtcl, cfg;
@@ -508,8 +511,12 @@ void ls1088a_handle_phy_interface_sgmii(int dpmac_id) return; } dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; + +#ifdef CONFIG_SGMII_PHYLIB bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); +#endif + }
void ls1088a_handle_phy_interface_qsgmii(int dpmac_id)