Hi Simon,
On Sat, Jul 31, 2021 at 9:03 AM Simon Glass sjg@chromium.org wrote:
On Fri, 30 Jul 2021 at 14:15, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
IRQ polarity in CSRT has the same definition as by ACPI specification chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e. ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller IRQ polarity is ActiveHigh.
Note, in DSDT (see southcluster.asl) it's described correctly.
Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller") Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/cpu/tangier/acpi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Oops, this was applied 1 minute earlier :-)
I've added your RB tag manually.
Regards, Bin