On Tue, Oct 31, 2023 at 12:06:09AM -0500, Samuel Holland wrote:
If the UART bus or baud clock has a gate, it must be enabled before the UART can be used.
Reviewed-by: Stefan Roese sr@denx.de Signed-off-by: Samuel Holland samuel@sholland.org
Changes in v3:
- Switch back to the original patch, now that the phycore-rk3288 build is fixed by enabling LTO.
Changes in v2:
- Only enable the first clock, as using the clk_get_bulk() API pushes a board (phycore-rk3288) over its SPL size limit.
drivers/serial/ns16550.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 6deb1d8ddc5..a206d00919c 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -514,6 +514,7 @@ int ns16550_serial_probe(struct udevice *dev) struct ns16550_plat *plat = dev_get_plat(dev); struct ns16550 *const com_port = dev_get_priv(dev); struct reset_ctl_bulk reset_bulk;
- struct clk_bulk clk_bulk; fdt_addr_t addr; fdt_addr_t size; int ret;
@@ -533,6 +534,10 @@ int ns16550_serial_probe(struct udevice *dev) if (!ret) reset_deassert_bulk(&reset_bulk);
- ret = clk_get_bulk(dev, &clk_bulk);
- if (!ret)
clk_enable_bulk(&clk_bulk);- com_port->plat = dev_get_plat(dev); ns16550_init(com_port, -1);
This causes some failure to builds on platforms where we don't have clk_get_bulk available such as lion-rk3368.