V3: 2/4: Fix RST/BYPASS seq issue to avoid glitch 4/4: ARM clk not use 24M for switch, use pll2_500m Add R-b/A-b tag Fix pll gate shift bit.
V2: 2/4: fix MASK/SHIFT usage
This is to support i.MX8MM clk driver. i.MX8MM use similar clock design as i.MX7D, but it has use different PLL, so we need to add pll14xx driver. And to simplify the clock usage, import the composite clk driver from Linux Kernel, then we could have simple clk tree.
This is to split the previous patchset https://github.com/MrVan/u-boot/commits/imx8mmn-ccf for i.MX8MM/N support
There are some checkpatch warnings that not addressed, because import from Linux Kernel.
Peng Fan (4): clk: imx: add Kconfig entry for i.MX8MM clk: imx: add pll14xx driver clk: imx: add i.MX8M composite clk support clk: imx: add i.MX8MM clk driver
drivers/clk/Kconfig | 4 +- drivers/clk/imx/Kconfig | 16 ++ drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-composite-8m.c | 170 +++++++++++++++ drivers/clk/imx/clk-imx8mm.c | 415 +++++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk-pll14xx.c | 381 ++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h | 25 +++ 7 files changed, 1011 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/imx/clk-composite-8m.c create mode 100644 drivers/clk/imx/clk-imx8mm.c create mode 100644 drivers/clk/imx/clk-pll14xx.c