U-Boot currently is missing GPIO support for FU540-C000 SoC which is mounted on HiFive Unleashed A00 board. This patch is intended to add DM based GPIO controller driver in order to access GPIO pins within the SoC using GPIO command in U-Boot. More details on the GPIO controller within the SoC can be found at[1]
The driver is based above master branch of u-boot-riscv.git and provides a method to configure Input/Output mode of the GPIO pin along with an option to set or clear state of the GPIO pin. The patch is available in dev/sagark/gpio_v2 branch here[2].
GPIO device node added to the mainline bound device tree for HiFive Unleashed is available in dev/sagark/mlv5.3-rc5 branch of repo here[3].
This implementation is ported from linux driver submitted for review at [4].
More details of GPIO pin routing on J1 header is available in schematic document[5]
[1] https://static.dev.sifive.com/FU540-C000-v1.0.pdf [2] https://github.com/sagsifive/u-boot [3] https://github.sifive.com/sagsifive/riscv-linux/ [4] https://lkml.org/lkml/2018/10/9/1103 [5] https://static.dev.sifive.com/dev-kits/hifive-unleashed/hifive-unleashed-a00...
Driver Testing: #Set GPIO1 high. =>gpio set 1 Can be confirmed by probing pin No #24 on J1 Header or memory dump of gpio register space viz: #md 0x10060000
#Set GPIO1 low =>gpio clear 0
#Toggle GPIO1 =>gpio toggle 1 #Toggle value of GPIO1 =>gpio toggle 1 #Toggle value of GPIO1
#Configure pin as input =>gpio input 3 #Configure gpio line 3 as input.
Sagar Shrikant Kadam (1): gpio: fu540: add support for DM based gpio driver for FU540 SoC
arch/riscv/include/asm/arch-generic/gpio.h | 35 +++++++ arch/riscv/include/asm/gpio.h | 6 ++ board/sifive/fu540/Kconfig | 3 + drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/fu540-gpio.c | 145 +++++++++++++++++++++++++++++ 6 files changed, 198 insertions(+) create mode 100644 arch/riscv/include/asm/arch-generic/gpio.h create mode 100644 arch/riscv/include/asm/gpio.h create mode 100644 drivers/gpio/fu540-gpio.c