On 02/12/2014 10:59 PM, Scott Wood wrote:
Most operations are read (we use a separate YAFFS partition for time predictable writes), so UBI will relocate read-only blocks anyway (due to read disturbances), I think the effect wont be too dramatic, but don't make me proof that ;-)
This sounds like a very bad idea.
Agreed.
SPL on i.MX31 is limited to 2kB so we can't use BCH 4 here, just as you guessed.
You could use TPL (three stage extension of SPL). 2K SPL loads 126K TPL, which has BCH code and can load the real U-Boot.
See doc/README.TPL, and include/configs/p1_p2_rdb_pc.h for an example.
Yes I read that, but it's not done for i.mx31 and I thought it might be harder to do, than just a second u-boot. This might proof wrong.
jumping to it. If I set a breakpoint in the do_go_exec() I can step right into the second u-boot.
Make sure you're cleaning the cache for that second load, if required.
Currently I turned off cashes in the first u-boot and hoped that would do.
Helmut
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