This commit removes remaining uses of SYS_NAND_ECC_BASE. Including "<asm/arch/hardware.h>" in "drivers/mtd/nand/raw/atmel_nand.c" provides access to ATMEL_BASE_ECC.
Cc: Simon Glass sjg@chromium.org Signed-off-by: Derald D. Woods woods.technical@gmail.com --- drivers/mtd/nand/raw/atmel_nand.c | 19 ++++++++++--------- include/configs/snapper9g45.h | 1 - scripts/config_whitelist.txt | 1 - 3 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c index 31ad2cfa88..0563472b9d 100644 --- a/drivers/mtd/nand/raw/atmel_nand.c +++ b/drivers/mtd/nand/raw/atmel_nand.c @@ -13,6 +13,7 @@ #include <common.h> #include <asm/gpio.h> #include <asm/arch/gpio.h> +#include <asm/arch/hardware.h>
#include <malloc.h> #include <nand.h> @@ -995,13 +996,13 @@ static int atmel_nand_calculate(struct mtd_info *mtd, unsigned int ecc_value;
/* get the first 2 ECC bytes */ - ecc_value = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR); + ecc_value = ecc_readl(ATMEL_BASE_ECC, PR);
ecc_code[0] = ecc_value & 0xFF; ecc_code[1] = (ecc_value >> 8) & 0xFF;
/* get the last 2 ECC bytes */ - ecc_value = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, NPR) & ATMEL_ECC_NPARITY; + ecc_value = ecc_readl(ATMEL_BASE_ECC, NPR) & ATMEL_ECC_NPARITY;
ecc_code[2] = ecc_value & 0xFF; ecc_code[3] = (ecc_value >> 8) & 0xFF; @@ -1084,16 +1085,16 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat, unsigned int ecc_word, ecc_bit;
/* get the status from the Status Register */ - ecc_status = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, SR); + ecc_status = ecc_readl(ATMEL_BASE_ECC, SR);
/* if there's no error */ if (likely(!(ecc_status & ATMEL_ECC_RECERR))) return 0;
/* get error bit offset (4 bits) */ - ecc_bit = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR) & ATMEL_ECC_BITADDR; + ecc_bit = ecc_readl(ATMEL_BASE_ECC, PR) & ATMEL_ECC_BITADDR; /* get word address (12 bits) */ - ecc_word = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR) & ATMEL_ECC_WORDADDR; + ecc_word = ecc_readl(ATMEL_BASE_ECC, PR) & ATMEL_ECC_WORDADDR; ecc_word >>= 4;
/* if there are multiple errors */ @@ -1164,22 +1165,22 @@ int atmel_hwecc_nand_init_param(struct nand_chip *nand, struct mtd_info *mtd) switch (mtd->writesize) { case 512: nand->ecc.layout = &atmel_oobinfo_small; - ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, + ecc_writel(ATMEL_BASE_ECC, MR, ATMEL_ECC_PAGESIZE_528); break; case 1024: nand->ecc.layout = &atmel_oobinfo_large; - ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, + ecc_writel(ATMEL_BASE_ECC, MR, ATMEL_ECC_PAGESIZE_1056); break; case 2048: nand->ecc.layout = &atmel_oobinfo_large; - ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, + ecc_writel(ATMEL_BASE_ECC, MR, ATMEL_ECC_PAGESIZE_2112); break; case 4096: nand->ecc.layout = &atmel_oobinfo_large; - ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, + ecc_writel(ATMEL_BASE_ECC, MR, ATMEL_ECC_PAGESIZE_4224); break; default: diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index f2c47dabc5..4b384641d1 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -36,7 +36,6 @@
/* NAND Flash */ #define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e2c2889acf..6fee575a43 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3543,7 +3543,6 @@ CONFIG_SYS_NAND_ECCPOS CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_ECCSTEPS CONFIG_SYS_NAND_ECCTOTAL -CONFIG_SYS_NAND_ECC_BASE CONFIG_SYS_NAND_ENABLE_PIN CONFIG_SYS_NAND_ENABLE_PIN_SPL CONFIG_SYS_NAND_FTIM0