From: David Huang d-huang@ti.com
Add support for DDR subsystem in J721S2 SoC.
Signed-off-by: David Huang d-huang@ti.com Signed-off-by: Aswath Govindraju a-govindraju@ti.com --- drivers/ram/Kconfig | 12 ++++++++++++ drivers/ram/k3-ddrss/Makefile | 4 ++++ 2 files changed, 16 insertions(+)
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index a79594d35198..2b6b1d57aaaa 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -63,6 +63,7 @@ choice prompt "K3 DDRSS Arch Support"
default K3_J721E_DDRSS if SOC_K3_J721E + default K3_J721S2_DDRSS if SOC_K3_J721S2 default K3_AM64_DDRSS if SOC_K3_AM642
config K3_J721E_DDRSS @@ -75,6 +76,17 @@ config K3_J721E_DDRSS Enabling this config adds support for the DDR memory controller on J721E family of SoCs.
+config K3_J721S2_DDRSS + bool "Enable J721S2 DRSS support" + help + The J721S2 DDR subsystem comprises DDR controller, DDR PHY and + wrapper logic to integrate these blocks in the device. The DDR + subsystem is used to provide an interface to external SDRAM + devices which can be utilized for storing program or data. + Enabling this config adds support for the DDR memory controller + on J721S2 family of SoCs. + + config K3_AM64_DDRSS bool "Enable AM64 DDRSS support" help diff --git a/drivers/ram/k3-ddrss/Makefile b/drivers/ram/k3-ddrss/Makefile index 8be00118f501..d30bf5ec6dab 100644 --- a/drivers/ram/k3-ddrss/Makefile +++ b/drivers/ram/k3-ddrss/Makefile @@ -15,3 +15,7 @@ ccflags-$(CONFIG_K3_AM64_DDRSS) += -Idrivers/ram/k3-ddrss/16bit/ obj-$(CONFIG_K3_J721E_DDRSS) += lpddr4_32bit.o obj-$(CONFIG_K3_J721E_DDRSS) += lpddr4_32bit_ctl_regs_rw_masks.o ccflags-$(CONFIG_K3_J721E_DDRSS) += -Idrivers/ram/k3-ddrss/32bit/ + +obj-$(CONFIG_K3_J721S2_DDRSS) += lpddr4_32bit.o +obj-$(CONFIG_K3_J721S2_DDRSS) += lpddr4_32bit_ctl_regs_rw_masks.o +ccflags-$(CONFIG_K3_J721S2_DDRSS) += -Idrivers/ram/k3-ddrss/32bit/