
19 Jan
2024
19 Jan
'24
5:09 p.m.
On Tue, Jan 09, 2024 at 02:15:51PM +0530, Sekhar Nori wrote:
Entry for physical address 0x500000000 in memory map table for MMU configuration is spilling over and inadvertently making DDR available at higher address (above 4GB address space) get mapped as device memory (nGnRnE).
Fix this by adjusting entry size. Tested on AM62A SK. Before this patch:
=> time crc32 0x881000000 0x20000000 crc32 for 881000000 ... 8a0ffffff ==> 7f34d7ca
time: 1 minutes, 14.716 seconds
After patch:
=> time crc32 0x881000000 0x20000000 crc32 for 881000000 ... 8a0ffffff ==> 7f34d7ca
time: 2.710 seconds
Acked-by: Andrew Davis afd@ti.com Signed-off-by: Sekhar Nori nsekhar@ti.com Reviewed-by: Nishanth Menon nm@ti.com
Applied to u-boot/master, thanks!
--
Tom