imx8mn speed grade fuse uses new definitions as below. So have to update get_cpu_speed_grade_hz function to match it.
SPEED_GRADE[5:4] SPEED_GRADE[3:0] MHz xx 0000 2300 xx 0001 2200 xx 0010 2100 xx 0011 2000 xx 0100 1900 xx 0101 1800 xx 0110 1700 xx 0111 1600 xx 1000 1500 xx 1001 1400 xx 1010 1300 xx 1011 1200 xx 1100 1100 xx 1101 1000 xx 1110 900 xx 1111 800
Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/cpu.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 55e3539cff..5b979cc1f5 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -314,6 +314,7 @@ enum cpu_speed { OCOTP_TESTER3_SPEED_GRADE1, OCOTP_TESTER3_SPEED_GRADE2, OCOTP_TESTER3_SPEED_GRADE3, + OCOTP_TESTER3_SPEED_GRADE4, };
u32 get_cpu_speed_grade_hz(void) @@ -326,7 +327,16 @@ u32 get_cpu_speed_grade_hz(void)
val = readl(&fuse->tester3); val >>= OCOTP_TESTER3_SPEED_SHIFT; - val &= 0x3; + + if (is_imx8mn()) { + val &= 0xf; + return 2300000000 - val * 100000000; + } + + if (is_imx8mm()) + val &= 0x7; + else + val &= 0x3;
switch(val) { case OCOTP_TESTER3_SPEED_GRADE0: @@ -337,6 +347,8 @@ u32 get_cpu_speed_grade_hz(void) return (is_mx7() ? 1000000000 : (is_imx8mq() ? 1300000000 : 1600000000)); case OCOTP_TESTER3_SPEED_GRADE3: return (is_mx7() ? 1200000000 : (is_imx8mq() ? 1500000000 : 1800000000)); + case OCOTP_TESTER3_SPEED_GRADE4: + return 2000000000; }
return 0;