Signed-off-by: Heiko Schocher hs@denx.de --- include/configs/kmeter1.h | 25 ++++++++++++++----------- 1 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 7b78a82..f9c01f5 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -52,10 +52,11 @@ #define CONFIG_SYS_HRCW_HIGH (\ HRCWH_CORE_ENABLE | \ HRCWH_FROM_0X00000100 | \ - HRCWH_BOOTSEQ_NORMAL | \ + HRCWH_BOOTSEQ_DISABLE | \ HRCWH_SW_WATCHDOG_DISABLE | \ HRCWH_ROM_LOC_LOCAL_16BIT | \ HRCWH_BIG_ENDIAN | \ + HRCWH_LALE_EARLY | \ HRCWH_LDP_CLEAR )
/* @@ -105,7 +106,8 @@ #define CONFIG_SYS_DDR_INTERVAL ((0x100 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ (0x406 << SDRAM_INTERVAL_REFINT_SHIFT))
-#define CONFIG_SYS_DDR_MODE 0x04440242 +#define CONFIG_SYS_DDRCDR 0x40000001 +#define CONFIG_SYS_DDR_MODE 0x04060242 #define CONFIG_SYS_DDR_MODE2 0x00800000
#define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ @@ -142,9 +144,10 @@ #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xF0000000 #define CONFIG_SYS_FLASH_BASE_1 0xF2000000 -#define CONFIG_SYS_PIGGY_BASE 0x80000000 +#define CONFIG_SYS_PIGGY_BASE 0xE8000000 +#define CONFIG_SYS_PIGGY_SIZE 128 #define CONFIG_SYS_PAXE_BASE 0xA0000000 -#define CONFIG_SYS_PAXE_SIZE 256 +#define CONFIG_SYS_PAXE_SIZE 512
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -175,8 +178,8 @@ * Bank Bus Machine PortSz Size Device * ---- --- ------- ------ ----- ------ * 0 Local GPCM 16 bit 256MB FLASH - * 1 Local GPCM 8 bit 256KB GPIO/PIGGY - * 3 Local GPCM 8 bit 256MB PAXE + * 1 Local GPCM 8 bit 128MB GPIO/PIGGY + * 3 Local GPCM 8 bit 512MB PAXE * */ /* @@ -210,12 +213,12 @@ * PRIO1/PIGGY on the local bus CS1 */ #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_PIGGY_BASE /* Window base at flash base */ -#define CONFIG_SYS_LBLAWAR1_PRELIM 0x80000011 /* 256KB window size */ +#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000001A /* 128MB window size */
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_PIGGY_BASE | \ (1 << BR_PS_SHIFT) | /* 8 bit port size */ \ BR_V) -#define CONFIG_SYS_OR1_PRELIM (0xfffc0000 | /* 256KB */ \ +#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_PIGGY_SIZE) | /* 128MB */ \ OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \ OR_GPCM_SCY_2 | \ OR_GPCM_TRLX | OR_GPCM_EAD) @@ -224,7 +227,7 @@ * PAXE on the local bus CS3 */ #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_PAXE_BASE /* Window base at flash base */ -#define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000001b /* 256MB window size */ +#define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000001C /* 512MB window size */
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_PAXE_BASE | \ (1 << BR_PS_SHIFT) | /* 8 bit port size */ \ @@ -346,7 +349,7 @@
/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */ #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PIGGY_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PIGGY_BASE | BATU_BL_256K | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PIGGY_BASE | BATU_BL_128M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT2L (CONFIG_SYS_PIGGY_BASE | BATL_PP_10 | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U @@ -366,7 +369,7 @@
/* PAXE: icache cacheable, but dcache-inhibit and guarded */ #define CONFIG_SYS_IBAT5L (CONFIG_SYS_PAXE_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PAXE_BASE | BATU_BL_256K | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PAXE_BASE | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT5L (CONFIG_SYS_PAXE_BASE | BATL_PP_10 | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U