The SCLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of SCLK_USB3OTGx_REF clocks to fix reference clock period configuration.
Also replace use of 24000000 with the OSC_HZ constant.
Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- v2: Collect r-b tags --- drivers/clk/rockchip/clk_rk3399.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 0b3223611a32..67b2c05ec9ed 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -976,7 +976,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case SCLK_UART1: case SCLK_UART2: case SCLK_UART3: - return 24000000; + case SCLK_USB3OTG0_REF: + case SCLK_USB3OTG1_REF: + return OSC_HZ; case PCLK_HDMI_CTRL: break; case DCLK_VOP0: