18 Mar
2011
18 Mar
'11
6:57 a.m.
On 2011/01/29 9:24 AM, Albert ARIBAUD wrote:
Hi Michael,
Le 29/01/2011 02:00, Michael Spang a écrit :
This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers.
Side note: IIUC this change is not required since the CPU Window registers match the SDRAM controller registers on orion5x in U-boot; but it is fine if only for the sake of correctness, and assuming it works for other orion5x boards (testing underway for edminiv2).
I have this same change in my patch set for the DNS323, for what it is worth. I must have needed it, but I can't remember exactly what the behaviour was without it. :-)
Rogan