On Friday, November 13, 2015 at 07:11:18 AM, Stefan Roese wrote:
Hi Philipp,
On 12.11.2015 18:23, Philipp Rosenberger wrote:
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist 0x54 not 0x24.
Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02 page 3-17 Reset Manager Module Address Map
Signed-off-by: Philipp Rosenberger ilu@linutronix.de
arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index 8e59578..6eb6011 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -25,6 +25,7 @@ struct socfpga_reset_manager {
u32 per2_mod_reset; u32 brg_mod_reset; u32 misc_mod_reset;
u32 padding2[12];
u32 tstscratch;
};
Thanks. But usually such padding things are added as "u8" (1 byte) variables. This makes it easier to calculate the offsets. In this case:
- u8 padding2[0x30];
which I would prefer.
I don't mind either way, I can amend the patch (if you don't mind), so let's hear Dinh's final word.
Best regards, Marek Vasut