AVS is enabled at R5 SPL stage, on few platforms like J721E and J7200 clk-k3 is used instead if clk-sci driver.
Add support in clk-k3 driver as well to notify AVS driver upon setting clock rate so that voltage is changed accordingly.
Cc: Keerthy j-keerthy@ti.com Signed-off-by: Udit Kumar u-kumar1@ti.com --- Change log: Changes in v2: - Kept clk-sci.c as is because this is used by AM64 and AM65 platforms - v1 link https://lore.kernel.org/all/20230919060649.2518147-1-u-kumar1@ti.com/
drivers/clk/ti/clk-k3.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c index ba925fa3c4..8016c3784a 100644 --- a/drivers/clk/ti/clk-k3.c +++ b/drivers/clk/ti/clk-k3.c @@ -11,6 +11,7 @@ #include <errno.h> #include <soc.h> #include <clk-uclass.h> +#include <k3-avs.h> #include "k3-clk.h"
#define PLL_MIN_FREQ 800000000 @@ -339,6 +340,10 @@ static ulong ti_clk_set_rate(struct clk *clk, ulong rate) } }
+ if (IS_ENABLED(CONFIG_K3_AVS0)) + k3_avs_notify_freq(data->map[clk->id].dev_id, + data->map[clk->id].clk_id, rate); + return new_rate; }