Hi Marek,
From: Marek Vasut marex@denx.de Sent: mardi 31 mars 2020 02:49
The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the DT.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com
V2: Drop the explicit flash type in DT node, use spi-flash
arch/arm/dts/stm32mp157a-avenger96.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts index 3fca1ed56d..512ef5f7bb 100644 --- a/arch/arm/dts/stm32mp157a-avenger96.dts +++ b/arch/arm/dts/stm32mp157a-avenger96.dts @@ -20,6 +20,7 @@ mmc0 = &sdmmc1; serial0 = &uart4; serial1 = &uart7;
spi0 = &qspi;};
chosen {
@@ -300,6 +301,25 @@ vdd_3v3_usbfs-supply = <&vdd_usb>; };
+&qspi {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
- reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
In https://www.dh-electronics.com/en/products/dhsom-system-on-modules/dhcor-stm...
SPI NOR flash => 2 Mbyte boot flash
So I think that memory mapped register should be limited to 2Mbyte = 0x200000 and not 64MBytes
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
- flash0: spi-flash@0 {
compatible = "jedec,spi-nor";reg = <0>;spi-rx-bus-width = <4>;spi-max-frequency = <108000000>;#address-cells = <1>;#size-cells = <1>;- };
+};
&rng1 { status = "okay"; }; -- 2.25.1