On Fri, Sep 30, 2022 at 03:42:42PM +0300, Roger Quadros wrote:
Hi Tom,
On 29/09/2022 20:51, Tom Rini wrote:
On Wed, Sep 28, 2022 at 03:11:46PM +0300, Roger Quadros wrote:
Hi,
The GPMC is a unified memory controller dedicated for interfacing with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on the settings specified in the Device tree and then probe its children.
Does this mean we'll be seeing some updates to (or removal of) the existing nand/gpmc code under arch/arm/mach-omap2 ?
My initial plan was to get AM64 NAND to work without requiring any arch specific code. This should eventually be usable for mach-omap2 as well.
We can then get rid of /arch/arm/mach-omap2/mem-common.c
I have an omap3-beagle with NAND support with me so I could at least get it working on that board.
It should be pretty much the same for all mach-omap2 boards.
Sounds good, thanks!