This patch series contains small fixes for RISC-V. It touches three areas.
- Patch 1 clarifies the error message on undefined exceptions. - Patch 2 removes the current dcache flush implementation. It uses the fence instruction, which does not directly affect the data cache and can therefore not be used to implement dcache flush and invalidation. - Patches 3-6 improve support for standalone applications. They add support for RV64I systems and fix a problem, where a callee-saved register is used without saving it beforehand. Patch 6 defines the standalone load address for qemu-riscv to allow it to run standalone applications.
Lukas Auer (6): riscv: clarify error message on undefined exceptions riscv: remove invalid dcache flush implementation riscv: remove RISC-V standalone linker script riscv: replace use of callee-saved register in standalone riscv: support standalone applications on RV64I systems riscv: qemu: define standalone load address
arch/riscv/config.mk | 3 +-- arch/riscv/lib/cache.c | 4 +--- arch/riscv/lib/interrupts.c | 3 ++- examples/standalone/riscv.lds | 40 ----------------------------------- examples/standalone/stubs.c | 21 +++++++++++++----- include/configs/qemu-riscv.h | 2 ++ 6 files changed, 22 insertions(+), 51 deletions(-) delete mode 100644 examples/standalone/riscv.lds