
+# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).a
+COBJS-y += meesc.o
please use $(BOARD)
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+clean:
- rm -f $(SOBJS) $(OBJS)
+distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk new file mode 100644 index 0000000..9ce161e --- /dev/null +++ b/board/esd/meesc/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..122707a --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,400 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- (C) Copyright 2008
- Ulf Samuelsson ulf@atmel.com
- (C) Copyright 2009
- Daniel Gorsulowski daniel.gorsulowski@esd.eu
- esd electronic system design gmbh <www.esd.eu>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#include <nand.h> +#include <dataflash.h>
+DECLARE_GLOBAL_DATA_PTR;
+/*
- Miscelaneous platform dependent initialisations
- */
+static void meesc_serial_hw_init(void) +{
- /* initialize DBGU pins*/
- at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
- at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
please use new hw_init framwork
+#define LED1A AT91_PIN_PB8 +#define LED1B AT91_PIN_PB7 +static void meesc_gpio_hw_init(void) +{
- /* Peripheral Clock Enable Register */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
1 << AT91SAM9263_ID_PIOB |
1 << AT91SAM9263_ID_PIOCDE);
- /* defines ports as output */
- at91_set_gpio_output(LED1A, 0);
- at91_set_gpio_output(LED1B, 0);
+}
+#ifdef CONFIG_CMD_NAND +static void meesc_nand_hw_init(void) +{
- unsigned long csa;
- /* Enable CS3 */
- csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
- at91_sys_write(AT91_MATRIX_EBI0CSA,
csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
- /* Configure SMC CS3 for NAND/SmartMedia */
- at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
- at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
- at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
- at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_DBW_16 |
+#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_DBW_8 |
+#endif
AT91_SMC_TDF_(2));
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+} +#endif /* CONFIG_CMD_NAND */
+static void meesc_ethercat_hw_init(void) +{
do you have intention to use it in U-Boot?
- /* Configure SMC EBI1_CS0 for EtherCAT */
- at91_sys_write(AT91_SMC1_SETUP(0),
AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
- at91_sys_write(AT91_SMC1_PULSE(0),
AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) |
AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9));
- at91_sys_write(AT91_SMC1_CYCLE(0),
AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5));
- /* Configure behavior at external wait signal, byte-select mode, 16 bit
- data bus width, none data float wait states and TDF optimization */
at91_sys_write(AT91_SMC1_MODE(0),
AT91_SMC_READMODE |
AT91_SMC_EXNWMODE_READY |
AT91_SMC_BAT_SELECT |
AT91_SMC_DBW_16 |
AT91_SMC_TDF_(0) |
AT91_SMC_TDFMODE);
- /* Configure RDY/BSY */
- at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */
+}
+int board_init(void) +{
- /* Enable Ctrlc */
- console_init_f();
- /* arch number of AT91SAM9263EK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
please use your own arch number
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- meesc_serial_hw_init();
- meesc_gpio_hw_init();
+#ifdef CONFIG_CMD_NAND
- meesc_nand_hw_init();
+#endif
- meesc_ethercat_hw_init();
+#ifdef CONFIG_HAS_DATAFLASH
- meesc_spi_hw_init();
+#endif +#ifdef CONFIG_MACB
- meesc_macb_hw_init();
+#endif
- return(0);
+}
+int dram_init(void) +{
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return(0);
+}
+int board_eth_init(bd_t *bis) +{
- int rc = 0;
+#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00);
+#endif
- return(rc);
+}
+int checkboard(void) +{
- char serno[32];
- puts("Board: esd CAN-EtherCAT Gateway\n");
- if (getenv_r("serial#", serno, sizeof(serno)) > 0) {
puts(", serial# ");
puts(serno);
- }
- printf("Hardware-revision: 1.%d\n", get_hw_rev());
- return(0);
+}
+int get_hw_rev(void) +{
- int rev = at91_get_gpio_value(AT91_PIN_PB19);
- rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
- rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
- rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
- if (rev == 15)
rev = 0;
- return(rev);
+}
+int set_gpio(int argc, char *argv[], unsigned pin) +{
- int i = 0;
- if (argc > 1) {
i = argv[1][0] == '1';
printf("Setting GPIO-pin to '%d'\n", i);
at91_set_gpio_output(pin, i);
- } else
puts("None value given!\n");
- return(0);
+}
+/*
- u-boot commands
- */
+/*
- LED-functions
- */
+int do_led_1a(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
- return(set_gpio(argc, argv, LED1A));
+} +U_BOOT_CMD(
- led_1a, 2, 1, do_led_1a,
- "switch LED1A on or off",
- "\n"
+);
+int do_led_1b(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
- return(set_gpio(argc, argv, LED1B));
+} +U_BOOT_CMD(
- led_1b, 2, 1, do_led_1b,
- "switch LED1B on or off",
- "\n"
+);
Ulf send a patch some weeks ago for this purpose please take a look on it Subject: [U-Boot] [PATCH 1/1] ARM: Add command to control coloured led from the console
+/*
- USB-cable detect and ET1100 word switching
- */
+int do_usbstat(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
- at91_set_gpio_input(AT91_PIN_PA25, 0);
- udelay(10000);
- if (at91_get_gpio_value(AT91_PIN_PA25))
puts("USB Cable detected\n");
- else
puts("USB Cable not detected\n");
- return(0);
+} +U_BOOT_CMD(
- usbstat, 2, 1, do_usbstat,
- "print status of USB-Device Port",
- "\n"
+);
IMHO it's could be a generic command
+int do_wswitch(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
- if (get_hw_rev() == 0)
return(set_gpio(argc, argv, AT91_PIN_PA25));
- else {
puts("Not a prototype, word-switching not provided!\n");
return(0);
- }
+} +U_BOOT_CMD(
- wswitch, 2, 1, do_wswitch,
- "select read word on ET1100 (prototypes only)",
- "\n"
+);
+/*
- CAN physical layer test
- */
+int do_cantst(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
- unsigned int error = 0;
- puts("Toggeling Port PA13 (CANTX)... ");
- /* defines PA13 as output */
- at91_set_gpio_output(AT91_PIN_PA13, 0);
- /* defines PA14 as input, internal pullup */
- at91_set_gpio_input(AT91_PIN_PA14, 1);
- while (!tstc() && !error) { /* wait for key press or error */
at91_set_gpio_value(AT91_PIN_PA13, 1);
if (!at91_get_gpio_value(AT91_PIN_PA14))
error = 1;
at91_set_gpio_value(AT91_PIN_PA13, 0);
if (at91_get_gpio_value(AT91_PIN_PA14))
error = 1;
- }
- if (error)
puts("CAN error!!\n");
- else {
puts("done\n");
getc(); /* consume input */
- }
- return(0);
+} +U_BOOT_CMD(
- cantst, 2, 1, do_cantst,
- "toggles CANTX-Pin",
- "\n"
+);
could you be more specific about all this new command and please add a readme
diff --git a/include/configs/meesc.h b/include/configs/meesc.h new file mode 100644 index 0000000..859c4a5 --- /dev/null +++ b/include/configs/meesc.h @@ -0,0 +1,185 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- (C) Copyright 2009
- Daniel Gorsulowski daniel.gorsulowski@esd.eu
- esd electronic system design gmbh <www.esd.eu>
- Configuation settings for the esd MEESC board.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+/* ARM asynchronous clock */ +#define AT91_CPU_NAME "AT91SAM9263" +#define AT91_MAIN_CLOCK 16000000 /* 16.0 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_AT91_PLLB 0x00023f01 /* PLLB settings for USB */
I'm preparing a new patch that will allow us to remove all this clock hardcoded define please wait one or two days
+#define CONFIG_SYS_HZ 1000 /* decrementer freq */
+#define AT91_SLOW_CLOCK 32768 /* slow clock */
+#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC*/ +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_PREBOOT /* enable preboot variable */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1
+#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT
+/*
- Hardware drivers
- */
+#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */
+#define CONFIG_BOOTDELAY 3
+/*
- BOOTP options
- */
+#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1
+/*
- Command line configuration.
- */
+#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_USB
+#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1
+/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */
+/* DataFlash */ +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5000*CONFIG_SYS_HZ)
please add space before and after '*'
+#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24)
+/* NOR flash is not populated, disable it */ +#define CONFIG_SYS_NO_FLASH 1
Best Regards, J.