Re: [U-Boot] [RFC] [PATCH 0/4] Add support for Freescale's 85xx and P1/P2xxx eSPI controller

Dear Wolfgang Denk, Can Aydin,

...

True, a GPIO pin could be re-purposed to serve as chip select, but that would involve a soldering iron and a steady hand as the P1/P2xxRDB

That was not the question.

Reinhard asked if the SPI Chip Select Pins could be configured such so that they can be used in GPIO mode instead of special function mode. That would make code way simpler.

Exactly. Just have this pin work as GPIO, while the rest stays special function. But then, some SoCs can not individually assign pins to special functions but can only do that in groups. Maybe that's the issue here.

And then: currently an "sf write" is not restricted in the length of data written. It would be limited due to the malloc needed for the patch.

Reinhard