Dear Anton Staaf,
In message CAF6FioXuWF5ar4G9x6JsHw0n6VyWE=6o5zj0m8DePOsOt7hsKQ@mail.gmail.com you wrote:
I have now run MAKEALL for both ARMv7a and PowerPC successfully. There were a number of build failures for "powerpc", but no new ones given my patch. I'd like to land this soon so I can get to landing the fixes for the unaligned buffers in U-Boot.
Um...
1e41f5a 2011-10-23 20:50:43 +0200 cache: include asm/cache.h for ARCH_DMA_MINALIGN definition 3620f86 2011-10-23 20:50:43 +0200 x86: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 72d4dd4 2011-10-23 20:50:43 +0200 mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment ee729af 2011-10-23 20:50:43 +0200 microblaze: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 75ff24b 2011-10-23 20:50:42 +0200 avr32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 3c3f8a7 2011-10-23 20:50:42 +0200 sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 2482e3c 2011-10-23 20:50:42 +0200 sh: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 0991701 2011-10-23 20:50:42 +0200 powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 6fa6035 2011-10-23 20:50:42 +0200 nios2: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment a8fc12e 2011-10-23 20:50:42 +0200 m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 44d6cbb 2011-10-23 20:50:42 +0200 arm: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Isn't this what you are asking for?
Best regards,
Wolfgang Denk