On 3/5/19 4:53 PM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
This version mainly resolved some comments from Simek in [v9].
This series is working on top of u-boot.git http://git.denx.de/u-boot.git
These patches are required before applying this series of patches
- [U-Boot,v4] misc: fs_loader: Add support for initializing block device
https://patchwork.ozlabs.org/project/uboot/list/?series=89282(done review)
- [U-Boot] misc: fs_loader: Replace label with DT phandle
https://patchwork.ozlabs.org/project/uboot/list/?series=92167(under review)
Tien Fong Chee (9): ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK ARM: socfpga: Cleaning up the messages ARM: socfpga: Move the watchdog reset to the looping location ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK spl : socfpga: Implement fpga bitstream loading with socfpga loadfs ARM: socfpga: Synchronize the configuration for A10 SoCDK ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 17 + .../include/mach/fpga_manager_arria10.h | 40 +- arch/arm/mach-socfpga/spl_a10.c | 31 +- board/altera/arria10-socdk/fit_spl_fpga.its | 38 ++ configs/socfpga_arria10_defconfig | 21 +- .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 +- drivers/fpga/socfpga_arria10.c | 514 ++++++++++++++++++++- include/configs/socfpga_common.h | 4 +- include/image.h | 4 + 9 files changed, 663 insertions(+), 32 deletions(-) create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its
Is this actually V11 ?