Index: board/jse/sdram.c
===================================================================
RCS file: /cvsroot/u-boot/u-boot/board/jse/sdram.c,v
retrieving revision 1.1
diff -p -u -r1.1 sdram.c
--- board/jse/sdram.c	15 Apr 2004 23:14:49 -0000	1.1
+++ board/jse/sdram.c	20 Jan 2006 22:25:21 -0000
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 Picture Elements, Inc.
+ * Copyright (c) 2004-2005 Picture Elements, Inc.
  *    Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
@@ -22,7 +22,6 @@
 #include <ppc4xx.h>
 #include <asm/processor.h>
 
-# define SDRAM_LEN 0x08000000
 
 /*
  * this is even after checkboard. It returns the size of the SDRAM
@@ -33,6 +32,11 @@
 long int initdram (int board_type)
 {
 	/* Configure the SDRAMS */
+	long int bank0;
+	long int bank1;
+	int idx;
+	long int val;
+	long int sdram_len = 0;
 
 	/* disable memory controller */
 	mtdcr (memcfga, mem_mcopt1);
@@ -60,13 +64,13 @@ long int initdram (int board_type)
 	mtdcr (memcfga, mem_sdtr1);
 	mtdcr (memcfgd, 0x010a4016);
 
-	/* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+	/* Memory Bank 0 Config == BA=0x00000000, SZ=256M, AM=3, BE=1 */
 	mtdcr (memcfga, mem_mb0cf);
-	mtdcr (memcfgd, 0x00084001);
+	mtdcr (memcfgd, 0x000c4001);
 
-	/* Memory Bank 1 Config == BA=0x04000000, SZ=64M, AM=3, BE=1 */
+	/* Memory Bank 1 Config == BA=0x10000000, SZ=256M, AM=3, BE=1 */
 	mtdcr (memcfga, mem_mb1cf);
-	mtdcr (memcfgd, 0x04084001);
+	mtdcr (memcfgd, 0x100c4001);
 
 	/* Memory Bank 2 Config ==  BE=0 */
 	mtdcr (memcfga, mem_mb2cf);
@@ -90,7 +94,138 @@ long int initdram (int board_type)
 	mtdcr (memcfga, mem_mcopt1);
 	mtdcr (memcfgd, 0x80e00000);
 
-	return SDRAM_LEN;
+	udelay(500);
+
+	/* Wait for memory to be ready by testing MRSCMPbit bit. */
+	for (idx = 0; idx < 1000000; idx += 1) {
+		mtdcr (memcfga, 0x24);
+		val = mfdcr (memcfgd);
+		if (val & 0x80000000)
+			break;
+	}
+
+	if (!(val & 0x80000000)) {
+		printf ("SDRAM ERROR: SDRAM0_STATUS never set!\n");
+		return 1;
+	}
+
+#ifdef DEBUG
+	printf("Probing for memory sizes 256, 128, 64\n");
+#endif
+	*(volatile unsigned long*)0x00000000 = 256;
+	*(volatile unsigned long*)0x08000000 = 128;
+	*(volatile unsigned long*)0x04000000 = 64;
+
+	*(volatile unsigned long*)0x10000000 = 256;
+	*(volatile unsigned long*)0x18000000 = 128;
+	*(volatile unsigned long*)0x14000000 = 64;
+
+	bank0 = *(volatile unsigned long*)0x00000000;
+	bank1 = *(volatile unsigned long*)0x10000000;
+
+#ifdef DEBUG
+	printf("Bank0 = %ldM, Bank1 = %ldM\n", bank0, bank1);
+#endif
+	if (bank0 >= bank1) {
+	      switch (bank0) {
+		  case 64:
+		    /* Bank Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+		    bank0 = 0x00084001;
+		    sdram_len = 0x04000000;
+		    break;
+		  case 128:
+		    /* Bank Config == BA=0x00000000, SZ=128M, AM=3, BE=1 */
+		    bank0 = 0x000a4001;
+		    sdram_len = 0x08000000;
+		    break;
+		  case 256:
+		    /* Bank Config == BA=0x00000000, SZ=256M, AM=3, BE=1 */
+		    bank0 = 0x000c4001;
+		    sdram_len = 0x10000000;
+		    break;
+	      }
+	      switch (bank1) {
+		  case 64:
+		    /* Bank Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+		    bank1 = sdram_len | 0x00084001;
+		    sdram_len += 0x04000000;
+		    break;
+		  case 128:
+		    /* Bank Config == BA=0x00000000, SZ=128M, AM=3, BE=1 */
+		    bank1 = sdram_len | 0x000a4001;
+		    sdram_len += 0x08000000;
+		    break;
+		  case 256:
+		    /* Bank Config == BA=0x00000000, SZ=256M, AM=3, BE=1 */
+		    bank1 = sdram_len | 0x000c4001;
+		    sdram_len += 0x10000000;
+		    break;
+	      }
+	} else {
+	      switch (bank1) {
+		  case 64:
+		    /* Bank Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+		    bank1 = 0x00084001;
+		    sdram_len = 0x04000000;
+		    break;
+		  case 128:
+		    /* Bank Config == BA=0x00000000, SZ=128M, AM=3, BE=1 */
+		    bank1 = 0x000a4001;
+		    sdram_len = 0x08000000;
+		    break;
+		  case 256:
+		    /* Bank Config == BA=0x00000000, SZ=256M, AM=3, BE=1 */
+		    bank1 = 0x000c4001;
+		    sdram_len = 0x10000000;
+		    break;
+	      }
+	      switch (bank0) {
+		  case 64:
+		    /* Bank Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+		    bank0 = sdram_len | 0x00084001;
+		    sdram_len += 0x04000000;
+		    break;
+		  case 128:
+		    /* Bank Config == BA=0x00000000, SZ=128M, AM=3, BE=1 */
+		    bank0 = sdram_len | 0x000a4001;
+		    sdram_len += 0x08000000;
+		    break;
+		  case 256:
+		    /* Bank Config == BA=0x00000000, SZ=256M, AM=3, BE=1 */
+		    bank0 = sdram_len | 0x000c4001;
+		    sdram_len += 0x10000000;
+		    break;
+	      }
+	}
+
+#ifdef DEBUG
+	printf("Bank0/1 config = 0x%08lx,0x%08lx\n", bank0, bank1);
+#endif
+	/* Set memory sizes back to measured values. */
+
+	/* Disable banks (DCE=0, BPRF=1, ECCDD=1, EMDUL=1) */
+	mtdcr (memcfga, mem_mcopt1);
+	mtdcr (memcfgd, 0x00e00000);
+
+	udelay(500);
+
+	/* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+	mtdcr (memcfga, mem_mb0cf);
+	mtdcr (memcfgd, bank0);
+
+	/* Memory Bank 1 Config == BA=0x04000000, SZ=64M, AM=3, BE=1 */
+	mtdcr (memcfga, mem_mb1cf);
+	mtdcr (memcfgd, bank1);
+
+	udelay(500);
+
+	/* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) */
+	mtdcr (memcfga, mem_mcopt1);
+	mtdcr (memcfgd, 0x80e00000);
+
+	udelay(500);
+
+	return sdram_len;
 }
 
 /*
@@ -103,7 +238,9 @@ int testdram (void)
 	unsigned long idx;
 	unsigned val;
 	unsigned errors;
+	char*testdram;
 	volatile unsigned long *sdram;
+	DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef DEBUG
 	printf ("SDRAM Controller Registers --\n");
@@ -148,35 +285,52 @@ int testdram (void)
 		return 1;
 	}
 
-	/* Start memory test. */
-	printf ("test: %u MB - ", SDRAM_LEN / 1048576);
+	if ( (testdram = getenv("testdram")) == 0 ) {
 
-	sdram = (unsigned long *) CFG_SDRAM_BASE;
+		/* Absent testdram settings, simply prefill memory. */
+		sdram = (unsigned long *) CFG_SDRAM_BASE;
 
-	printf ("write - ");
-	for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
-		sdram[idx + 0] = idx;
-		sdram[idx + 1] = ~idx;
-	}
-
-	printf ("read - ");
-	errors = 0;
-	for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
-		if (sdram[idx + 0] != idx)
-			errors += 1;
-		if (sdram[idx + 1] != ~idx)
-			errors += 1;
-		if (errors > 0)
-			break;
-	}
+#ifdef DEBUG
+		printf ("Clearing %u MB of SDRAM: ", gd->ram_size / 1048576);
+#endif
+		for (idx = 2; idx < gd->ram_size / 4; idx += 2) {
+			sdram[idx + 0] = 0;
+		}
+
+	} else {
+		/* Start memory test. */
+		printf ("Testing %u MB of SDRAM: ", gd->ram_size / 1048576);
+
+		sdram = (unsigned long *) CFG_SDRAM_BASE;
+
+		printf ("write - ");
+		for (idx = 2; idx < gd->ram_size / 4; idx += 2) {
+			sdram[idx + 0] = idx;
+			sdram[idx + 1] = ~idx;
+		}
+
+		printf ("read - ");
+		errors = 0;
+		for (idx = 2; idx < gd->ram_size / 4; idx += 2) {
+			if (sdram[idx + 0] != idx)
+				errors += 1;
+			if (sdram[idx + 1] != ~idx)
+				errors += 1;
+			if (errors > 0)
+				break;
+		}
+
+		if (errors > 0) {
+		      printf ("NOT OK\n");
+		      printf ("FIRST ERROR at %p: "
+			      "0x%08lx:0x%08lx != 0x%08lx:0x%08lx\n",
+			      sdram + idx,
+			      sdram[idx + 0], sdram[idx + 1], idx, ~idx);
+		      return 1;
+		}
 
-	if (errors > 0) {
-		printf ("NOT OK\n");
-		printf ("FIRST ERROR at %p: 0x%08lx:0x%08lx != 0x%08lx:0x%08lx\n",
-			sdram + idx, sdram[idx + 0], sdram[idx + 1], idx, ~idx);
-		return 1;
+		printf ("ok\n");
 	}
 
-	printf ("ok\n");
 	return 0;
 }
