Re: [U-Boot] [PATCH 13/14] sunxi: dram: Derive write recovery delay from DRAM clock speed

On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:

The write recovery time is 15ns for all JEDEC DDR3 speed bins. And instead of hardcoding it to 10 cycles, it is possible to set tighter timings based on accurate calculations. For example, DRAM clock frequencies up to 533MHz need only 8 cycles for write recovery.

Signed-off-by: Siarhei Siamashka siarhei.siamashka@gmail.com

Acked-by: Ian Campbell ijc@hellion.org.uk