
Hi Michael
-----Original Message----- From: Vladimir Oltean olteanv@gmail.com Sent: Thursday, October 21, 2021 5:30 PM To: Tom Rini trini@konsulko.com; Priyanka Jain priyanka.jain@nxp.com Cc: Michael Walle michael@walle.cc; Gaurav Jain gaurav.jain@nxp.com; Shengzhou Liu shengzhou.liu@nxp.com; Varun Sethi V.Sethi@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; Andy Tang andy.tang@nxp.com; festevam@gmail.com; Franck Lenormand franck.lenormand@nxp.com; Horia Geanta horia.geanta@nxp.com; Ji Luo ji.luo@nxp.com; Meenakshi Aggarwal meenakshi.aggarwal@nxp.com; Mingkai Hu mingkai.hu@nxp.com; Pankaj Gupta pankaj.gupta@nxp.com; Peng Fan peng.fan@nxp.com; Pramod Kumar pramod.kumar_1@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Sahil Malhotra sahil.malhotra@nxp.com; sbabic@denx.de; Silvano Di Ninno silvano.dininno@nxp.com; sjg@chromium.org; u-boot@lists.denx.de; dl-uboot-imx uboot-imx@nxp.com; Wasim Khan wasim.khan@nxp.com; Ye Li ye.li@nxp.com Subject: [EXT] Re: [PATCH v3 12/16] Layerscape: Add crypto node in device tree
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On Thu, Oct 21, 2021 at 07:50:46AM -0400, Tom Rini wrote:
On Thu, Oct 21, 2021 at 09:07:42AM +0200, Michael Walle wrote:
Hi,
LS(1021/1012/1028/1043/1046/1088/2088), LX2160 - updated device tree
Signed-off-by: Gaurav Jain gaurav.jain@nxp.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com
[..]
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 50f9b527cd..c2a156ea8e 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -2,7 +2,7 @@ /*
- NXP ls1028a SOC common device tree source
- Copyright 2019-2020 NXP
- Copyright 2019-2021 NXP
This will be removed again, because its not part of the kernel device tree.
*/
@@ -123,6 +123,45 @@ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
/* non-prefetchable memory */
};
- crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <10>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x8000000 0x100000>;
reg = <0x00 0x8000000 0x0 0x100000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
sec_jr0: jr@10000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr@20000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x20000 0x10000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr@30000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x30000 0x10000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr3: jr@40000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x40000 0x10000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
};
- };
While this one will collide with my DTB sync series [1]. I'd prefer to have my series merged first because then this patch will be unnecessary and I don't have to respin my series (yet again) because there were changes in the device tree in the meantime.
[1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flo re.kernel.org%2Fu-boot%2F20211013161427.612033-1-michael%40walle.cc%
2F&data=04%7C01%7Cgaurav.jain%40nxp.com%7C69354b20bb6348f0967 b08
d9948a5495%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63770414 4117
842325%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2lu MzIiL
CJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=vgaWPe88Isv5%2FhjV pjF
KBb0ETClYmqkKK3PbGyFChuE%3D&reserved=0
Very much agreed with what Michael is saying here.
Me too. Priyanka, could you please take a look at Michael's patches?
Will remove arch/arm/dts/fsl-ls1028a.dtsi from my patch series.
Regards Gaurav Jain